• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.1
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• pp.1-7
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• 2009

This paper describes design of high energy efficiency 32 bit parallel processor core using instruction-levels data gating and dynamic voltage scaling (DVS) techniques. We present instruction-levels data gating technique. We can control activation and switching activity of the function units in the proposed data technique. We present instruction-levels DVS technique without using DC-DC converter and voltage scheduler controlled by the operation system. We can control powers of the function units in the proposed DVS technique. The proposed instruction-levels DVS technique has the simple architecture than complicated DVS which is DC-DC converter and voltage scheduler controlled by the operation system and a hardware implementation is very easy. But, the energy efficiency of the proposed instruction-levels DVS technique having dual-power supply is similar to the complicated DVS which is DC-DC converter and voltage scheduler controlled by the operation system. We simulate the circuit simulation for running test program using Spectra. We selected reduced power supply to 0.667 times of the supplied power supply. The energy efficiency of the proposed 32 bit parallel processor core using instruction-levels data gating and DVS techniques can improve about 88.4% than that of the 32 bit parallel processor core without using those. The designed high energy efficiency 32 bit parallel processor core can utilize as the coprocessor processing massive data at high speed.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.963-972
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• 2002

An 8192-point pipelined FFT/IFFT processor core is designed, which can be used in multi-carrier modulation systems such as DUf-based VDSL modem and OFDM-based DVB system. In order to improve the signal-to-quantization-noise ratio (SQNR) of FFT/IFFT results, two-step convergent block floating-point (TS_CBFP) scaling is employed. Since the proposed TS_CBFP scaling does not require additional buffer memory, it reduces memory as much as about 80% when compared with conventional CBFP methods, resulting in area-and power-efficient implementation. The SQNR of about 60-㏈ is achieved with 10-bit input, 14-bit internal data and twiddle factors, and 16-bit output. The core synthesized using 0.25-$\mu\textrm{m}$ CMOS library has about 76,300 gates, 390K bits RAM, and twiddle factor ROM of 39K bits. Simulation results show that it can safely operate up to 50-㎒ clock frequency at 2.5-V supply, resulting that a 8192-point FFT/IFFT can be computed every 164-${\mu}\textrm{s}$. It was verified by Xilinx FPGA implementation.

• Journal of Power Electronics
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• v.16 no.1
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• pp.9-17
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• 2016

Maximum power point tracking (MPPT) is necessary for photovoltaic (PV) power system application to extract the maximum possible power under changing irradiation and temperature conditions. The β-parameter-based method has many advantages over conventional MPPT methods; such advantages include fast tracking speed in the transient stage, small oscillations in the steady state, and moderate implementation complexity. However, a problem in the implementation of the conventional beta method is the choice of an appropriate scaling factor N, which greatly affects both the steady-state and transient performance. Therefore, this paper proposes a modified β-parameter-based method, and the determination of the N is discussed in detail. The study shows that the choice of the scaling factor N is determined by the changes of the value of β during changes in irradiation or temperature. The proposed method can respond accurately and quickly during changes in irradiation or temperature. To verify the proposed method, a photovoltaic power system with MPPT function was built in Matlab/Simulink, and an experimental prototype was constructed with a solar array emulator and dSPACE. Simulation and experimental results are illustrated to show the advantages of the improved β-parameter-based method with the optimized scaling factor.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.5
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• pp.866-874
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• 2006

This paper proposes a new Dynamic Voltage Scaling(DVS) algorithm to achieve low-power scheduling of aperiodic hard real-time tasks. Aperiodic tasks schedulingcannot be applied to the conventional DVS algorithm and result in consuming energy more than periodic tasks because they have no period, non predictable worst case execution time, and release time. In this paper, we defined Virtual Periodic Task Set(VTS) which has constant period and worst case execution time, and released aperiodic tasks are assigned to this VTS. The period and worst case execution time of the virtual task can be obtained by calculating task utilization rate of both periodic and aperiodic tasks. The proposed DVS algorithm scales the frequency of both periodic and aperiodic tasks in VTS. Simulation results show that the energy consumption of the proposed algorithm is reduced by 11% over the conventional DVS algorithm for only periodic task.

• Journal of Ocean Engineering and Technology
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• v.35 no.1
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• pp.75-81
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• 2021

Artificial Coral Reefs (ACRs) have been introduced to help solve coastal erosion problems, but their feasibility has not been assessed with field data. This study conducted a feasibility analysis of ACRs on their erosion mitigation effects by performing a case study of Cheonjin-Bongpo beach, South Korea. A numerical-physical combined analysis was carried out using a SWAN model simulation and physical model test with a scale of 1/25 based on field observations of Cheonjin-Bongpo beach. Both Dean's parameter and the surf-scaling parameter were applied to comparative analysis between the absence and presence conditions of the ACR. The results for this combined method indicate that ACR attenuates the wave height significantly (59~71%). Furthermore, ACR helps decrease the mass flux (~50%), undertow (~80%), and maximum wave set up (~61%). The decreases in Dean's parameter (~66%) and the surf-scaling parameter suggest that the wave properties changed from the dissipative type to the reflective type even under high wave conditions. Consequently, an ACR can enhance shoreline stability.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.213-217
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• 2008

In this paper, a new design method for IMC-PID that adds a phase scaling factor of system identifications to the standard IMC-PID controller as a control parameter is proposed. Based on analytically derived frequency properties such as gain, phase margin and maximum magnitude of sensitivity function, this tuning rule is an optimal control method determining the optimum values of controlling factors to minimize the cost function, integral error criterion of the step response in time domain, in the constraints of design parameters to guarantee qualified frequency design specifications. The proposed controller improves existing single-parameter design methods of IMC-PID in the inflexibility problem to be able to consider various design specifications. Its effectiveness is examined by a simulation example, where a comparison of the performances obtained with the proposed tuning rule and with other common tuning rules is shown.

• Journal of Communications and Networks
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• v.16 no.1
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• pp.18-25
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• 2014

In this paper, we propose a codebook-based interference alignment (IA) scheme in the constant multiple-input multiple-output (MIMO) interference channel especially for the uplink scenario. In our proposed scheme, we assume cooperation among base stations (BSs) through reliable backhaul links so that global channel knowledge is available for all BSs, which enables BS to compute he transmit precoder and inform its quantized index to the associated user via limited rate feedback link. We present an upper bound on the rate loss of the proposed scheme and derive the scaling law of the feedback load to maintain a constant rate loss relative to IA with perfect channel knowledge. Considering the impact of overhead due to training, cooperation, and feedback, we address the effective degrees of freedom (DOF) of the proposed scheme and derive the maximization of the effective DOF. From simulation results, we verify our analysis on the scaling law to preserve the multiplexing gain and confirm that the proposed scheme is more effective than the conventional IA scheme in terms of the effective DOF.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.9B
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• pp.1082-1091
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• 2011

Power-reduction techniques based on DVFS(Dynamic Voltage and Frequency Scaling) are crucial for lengthening operating times of battery powered mobile systems. This paper proposes an optimal DVFS scheduling algorithm for decoders with memory size limitation on display buffer, which is realistic constraints not properly touched in the previous works. Furthermore, we mathematically prove that the proposed algorithm is optimal in the limited display buffer and limited clock frequency model, and also can be used for feasibility check. Simulation results show the proposed algorithm outperformed the previous heuristic algorithms by 7% in average, and the performance of all algorithms using display buffers saturates at about 10 frame size.

• Proceedings of the KSRS Conference
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• v.2
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• pp.639-642
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• 2006

The intensity-hue-saturation (IHS) technique has become a standard procedure in image analysis. It enhances the colour of highly correlated data. Unfortunately, IHS technique is sensitive to the properties of the analyzed area and usually faces colour distortion problems in the fused process. This paper explores the relationship of colour between before and after the fused process and the change in colour space of images. Subsequently, the fused colours are transformed back into the 'simulative' true colours by the following steps: (1) For each pixel of fused image that match with original pixel (of the coarse spectral resolution image) is transformed back to the true colour of original pixel. (2) The value for interpolating pixels is compensated to preserve the DN ratio between the original pixel and it's vicinity. The 'compensative matrix' is constructed by the DN of fused images and simulation of scaling process. An illustrative example of a Landsat and SPOT fused image also demonstrates the simulative true colour fusion methods.

• The Bulletin of The Korean Astronomical Society
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• v.39 no.2
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• pp.71.2-71.2
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• 2014

processes at the origin of the star formation in the galaxies over the last 10 billions years. While it was proposed in the past that merging of galaxies has a dominant role to explain the triggering of the star formation in the distant galaxies having high star formation rates. In the opposite, more recent studies revealed scaling laws linking the star formation rate in the galaxies to their stellar mass or their gas mass. The small dispersion of these laws seems to be in contradiction with the idea of powerful stochastic events due to interactions, but rather in agreement with the new vision of galaxy history where the latter are continuously fed by intergalactic gas. I was especially interested in one of this scaling law, the relation between the star formation (SFR) and the stellar mass (M*) of galaxies, commonly called the main sequence of star forming galaxies. I have studied this main sequence, SFR-M*, in function of the morphology and other physical parameters as the radius, the colour, the clumpiness. The goal was to understand the origin of the sequence's dispersion related to the physical processes underlying this sequence in order to identify the main mode of star formation controlling this sequence. This work needed a multi-wavelength approach as well as the use of galaxies profile simulation to distinguish between the different galaxy morphological types implied in the main sequence.