• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.10
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• pp.120-125
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• 2006

In contrast to the conventional trigatron switch in which the currents are constricted by the z-pinch mechanical the new switch operates in an inverse pinch geometry formed by a pair of spiral electrodes in a sealed-off type. Inverse pinch switch greatly reduces hot spot formations and protects the electrode surfaces. The switch can be initiated with an electrical trigger electrode. Advantages of the new switch over the conventional switches are longer useful life, high current capability and lower inductance due to the dispersed and moving current sheet. These improved characteristics may make the inverse pinch switch suitable for pulse power systems.

• Journal of Power Electronics
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• v.1 no.2
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• pp.71-77
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• 2001

This paper proposes a new zero-current switching (ZCS) pulse-width modulation (PWM) switch cell that has no additional conduction loss of the main switch. In this cell, the main switch and the auxiliary switch turn on and turn off under zero current condition. The diodes commutate softly and the reverse recovery problems are alleviated. The conduction loss and the current stress of the main switch are minimized, since the resonating current stress of the main switch are minimized, since the resonating current for the soft switching does not flow through the main switch. Based on the proposed ZCS PWM switch cell, a new family of DC to DC PWM converters is derived. The new family of ZCS PWM converters is suitable for the high power applications employing IGBTs. Among the new family of DC to DB PWM converters, a boost converter was taken as an example and has been analyzed. Design guidelines with a design example are described and verified by experimental results from the 2.5 kW prototype converter operating at 40 kHz.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.261-261
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• 2012

This paper presents the understandings carried out for the installation of the hydrogen reservoir of the multi-gap pseudospark switch under developing for the accelerator applications. As a cold cold cathode switch, the pseudospark switch could replace the thyratron switch which has hot cathode and being used well currently in the high power field such as laser and accelerator applications. Especially in the klystron modulator, the key component is a switch which mostly defines the jitter and the instability of the modulator system. To get the less jitter and the instability, we need to find proper range of the pressure for the gas discharge inside gas switch. This could be achieved by the understanding of the characteristic of the nonevaporable getter (NEG) which is used as a hydrogen reservoir for the switch. Therefore we verified the characteristics of the NEG (St 172, Saes) and its installation in the switch. Finally we controlled the getter to find best pressure point for the pseudospark switch.

• Journal of Communications and Networks
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• v.17 no.3
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• pp.286-295
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• 2015

Avionic databuses fulfill a critical function in the connection and communication of aircraft components and functions such as flight-control, navigation, and monitoring. Ethernet-based avionic databuses have become the mainstream for large aircraft owning to their advantages of full-duplex communication with high bandwidth, low latency, low packet-loss, and low cost. As a new generation aviation network communication standard, avionics full-duplex switched ethernet (AFDX) adopted concepts from the telecom standard, asynchronous transfer mode (ATM). In this technology, the switches are the key devices influencing the overall performance. This paper reviews the avionic databus with emphasis on the switch architecture classifications. Based on a comparison, analysis, and discussion of the different switch architectures, we propose a new avionic switch design based on a time-division switch fabric for high flexibility and scalability. This also merges the design concept of space-partition switch fabric to achieve reliability and predictability. The new switch architecture, called space partitioned shared memory switch (SPSMS), isolates the memory space for each output port. This can reduce the competition for resources and avoid conflicts, decrease the packet forwarding latency through the switch, and reduce the packet loss rate. A simulation of the architecture with optimized network engineering tools (OPNET) confirms the efficiency and significant performance improvement over a classic shared memory switch, in terms of overall packet latency, queuing delay, and queue size.

• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.48-55
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• 1997

Advances in VLSI technology have brought us completely new design principles for the high-performance switching fabrics including ATM switches. From a practical point of view, port scalability of ATM switches emerges as an important issue while complexity and performance of the switches have been major issues in the switch design. In this paper, we propose a cost-effective approach to modular ATM switch design which provides the good scalability. Taking advantages of both time-division and space-division switch architectures, we propose a practically implementable large scale ATM switch architecture. We present a scalable shared buffer type switch for a building block and its expansion method. In our design, a large scale ATM switch is realized by interconnecting the proposed shared buffer switches in three stages. We also present an efficient control mechanism of the shared buffers, synchronization method for the switches in each stage, and a flow control between stages. It is believed that the proposed approach will have a significant impact on both improving the ATM switch performance and enhancing the scalability of the switch with a new cost-effective scheme for handling the traffic congestion. We show that the proposed ATM switch provides an excellent performance and that its cell delay characteristic is comparable to output queueing which provides the best performance in cell delay among known approaches.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.7
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• pp.1393-1398
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• 2003

In this paper, we propose a new switch architecture with one schedule at k-time slots, which k means the allocated time slots for each schedule. A conventional switch system uses a single time slot per each schedule but the proposed switch system uses multiple time slots per each schedule. Both the conventional switch md the proposed switch have same throughput but our switch system occupies multiple cell time slots per each schedule and hence can be implemented in scheduler of simple circuitry compared to the conventional switch. The proposed scheduling method for switch system will be applicable in switch system with high-speed data link rate.

• Journal of the Microelectronics and Packaging Society
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• v.4 no.2
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• pp.79-83
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• 1997

본 연구에서는 휴대용 전화기 및 무선 LAN 의 핵심부품인 RF-Switch Module의 초소형화 설계기술, 표면실장기술, 고주파설계기술, 소형화 SMD기술, Test 기술 및 RF-Switch Module 활용기술 등을 개발하였으며 RF-Switch Module의 설계기반 마련 및 대외 경쟁력 있는 RF-Switch Module의 초소형화 기술을 확보하였다.

• Progress in Superconductivity
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• v.5 no.1
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• pp.13-16
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• 2003

In this work, we have studied about an RSFQ (Rapid Single Flux Quantum) switch element. The circuit was designed, simulated, and laid out for mask fabrication. The switch cell was composed of a D flip-flop, a splitter, a confluence buffer, and a switch core. The switch core determined if the input data could pass to the output. “On” and o“off” controls in the switch core could be possible by utilizing an RS flip-flop. When a control pulse was input to the “on” port, the RS flip-flop was in the set state and passed the input pulses to the output port. When a pulse was input to the “off” port, the RS flip-flop was in the reset state and prevented the input pulses from transferring to the output port. We simulated and optimized the switch element circuit by using Xic, WRspice, and Julia. The minimum circuit margins in simulations were more than $\pm$20%. We also performed the mask layout of the circuit by using Xic and Lmeter.

• Korean Management Science Review
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• v.10 no.1
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• pp.139-156
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• 1993

Various ATM switches have been proposed since Asynchronous Transfer Mode (ATM) was recognized as appropriate for implementing broadband integrated services digital network (BISDN). An ATM switching network may be evaluated on two sides : traffic performances (maximum throughput, delay, and packet loss probability, etc.) and structural features (complexity, i.e. the number of switch elements necessary to construct the same size switching network, maintenance, modularity, and fault tolerance, etc.). ATM switching networks proposed to date tend to show the contrary characteristics between structural features and traffic performance. The Knockout Switch, which is well known as one of ATM switches, shows a good traffic performance but it needs so many switch elements and buffers. In this paper, we propose an input and output buffered Knockout Switch for the purpose of reducing the number of switch elements and buffers of the existing Knockout Switch. We analyze the traffic performance and the structural features of the proposed switching architecture through a discrete time Markov chain and compare with those of the existing Knockout Switch. It was found that the proposed architecture could reduce more than 40 percent of switch elements and more than 30 percent of buffers under a given requirement of cell loss probability of the switch.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.158-161
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• 1999

This Paper proposes the architecture of WDM(wavelength division multiplexed) based large scale photonic packet switch network, which is composed of the FC(frequency converter) and OM (output module). The features of the proposed WDM based photonic packet switch network are 2-stage switch network, and WDM based internal optical link that is connected between FC and OM. This paper evaluates the internal call blocking characteristics of the photonic packet switch network. In results, we confirmed that the proposed WDM based photonic packet switch network has the potentiality in the practical implementation.