• Journal of Power Electronics
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• v.17 no.5
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• pp.1244-1255
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• 2017

The space vector pulse width modulation (SVPWM) technique is a popular PWM method for medium voltage drive applications. Conventional SVPWM (CSVPWM) and bus clamped SVPWM (BCSVPWM) are the most common SVPWM techniques. This paper evaluates the performance of various advanced BCSVPWM strategies in terms of their harmonic distortion and switching loss based on a uniform frame work. A uniform frame work, pulse number captures the performance parameter variations of different SVPWM strategies for various number of samples with heterogeneous pulse numbers. This work compares different advanced BCSVPWM techniques based on the modulation index and location of the clamping position (zero vector changing angle ) of a phase in a line cycle. The frame work provides a fixed fundamental frequency of 50Hz. The different BCSVPWM switching strategies are implemented and compared experimentally on a 415V, 2.2kW, 50Hz, 3-phase induction motor drive which is fed from an IGBT based 2 KVA voltage source inverter (VSI) with a DC bus voltage of 400 V. A low cost PIC microcontroller (PIC18F452) is used as the controller platform.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.216-218
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• 2008

This paper presents a space vector pulse width modulation (SVPWM) technique for four-switch three-phase (4S3P) inverter topology. The method aims to apply Field Oriented Control (FOC) of Induction motor using 4S3P. The simulations are carried out and the experimental results are given to verify the feasibility of this method.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1235-1243
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• 2015

This paper presents a modified Space Vector Pulse Width Modulation Technique (SVPWM), which solves the well-known problem of voltage imbalance in the capacitors of a single-phase multilevel inverter. The proposed solution is based on the measurement of DC voltage levels at each capacitor of the inverter DC bus. The measurements are then used to adjust the size of the active vectors within the SVPWM algorithm to keep the voltage waveform sinusoidal regardless of any voltage imbalance on the DC link capacitors. When a voltage deviation exceeds a predetermined hysteresis band, the correspondent voltage vector is restricted to restore the voltage level to an acceptable threshold. Hence, the need for external voltage regulators for the voltage capacitors is eliminated. The functionality of the proposed algorithm is successfully demonstrated through simulations and experiments on a grid tied application.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.620-624
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• 2004

Th is paper presents a systematical approach to study carrier based PWM techniques (CPWM) in diode-clamped and cascade multilevel inverters by using the proposed multi-modulating pattern method. This method is based on the vector correlation between CPWM and space vector PWM (SVPWM) and applicable to both multilevel inverter topologies. The CPWM technique can be described in a general mathematical equation, and obtain the same outputs similarly as of corresponding SVPWM. Control of the fundamental voltage, vector redundancies and phase redundancies in multilevel inverter can be formulated separately in the CPWM equation. The deduced CPWM can obtain a full vector redundancy control, and fully utilize phase redundancy in a cascade inverter. In the paper, CPWM equations and corresponding algorithm for generating multi-modulating signals will be performed, in which SVPWM attributes will be presented by corresponding controllable factors.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.61 no.1
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• pp.47-54
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• 2012

This paper presents implementation of SVPWM technique for three phase Voltage Source Inverter using FPGA. Software-based vector-control calculations much this drawback, in order to improve the hardware-vector-control tries. Without the need for additional software, vector control algorithm is designed to be modular SOPC, and DSP will reduce most of the operations. In this paper, the SVPWM that using HDL for the AC motor vector control algorithm level, and the dead time part and the speed control in order to controled a speed detector and designed in the form of modules. Then ALTERA corporation Cyclone III series EP3C16F484 can be verified by implemented.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2004.05a
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• pp.540-545
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• 2004

Conventional SVPWM method has null switching vectors. Null switching vectors cause common-mode voltage making high in induction motor drive system. New SVPWM method without using null switching vectors are proposed in the paper. So, new SVPWM method reduces the common mode voltage for induction motor drive system. It is realized by changing software without adding hardware to induction motor drive system. Simulation results show that common-mode voltage adapting proposed method are reduced regarding conventional method.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.384-388
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• 2004

High frequency common mode voltage produced by power inverters are a major cause of conducted EMI, creating motor ground currents, bearing currents and other harmful by products. This paper focuses on a new SVPWM method with random PWM injection to reduce conducted EMI noise. A New PWM technique associated with the common mode voltage can be significantly reducing and contributes to mitigate. The common mode voltage to $50\%$ in comparison with that for conventional SVPWM technique. Validation of the theory and reduction methods are then performed experiment ally based on an induction motor drive.

• Journal of Electrical Engineering and Technology
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• v.11 no.3
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• pp.670-674
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• 2016

The control performance of hybrid PWM inverter using a phase current measurement is presented in this paper. The hybrid PWM technique consists of space vector pulse width modulation (SVPWM) and six-step voltage control operation. The SVPWM is performed to reduce the harmonic components in the low speed region, and the six-step modulation is applied to increase the maximum speed of the IPMSM in the high speed region. Therefore, it is possible to obtain a great performance in both the low speed range and high speed range. However, the six-step modulation cannot be completely implemented, since the inverter that includes the lag-shunt sensing method has an immeasurable current region. In this paper, a quasi-six-step modulation using a modified voltage vector is proposed. The validity and usefulness of the proposed PWM technique is verified by MATLAB/Simulink and experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.6
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• pp.472-480
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• 2009

This paper describes the overmodulative SVPWM technique and harmonics analyses of three phase NPC type three-level inverter to the modulation index. Three phase NPC type three-level inverter adopted SVPWM to extend the linear region to 0.907, moreover, the following voltage compensation using Fourier series was adopted in the region of overmodulation to make it work to six-step level. PD type of multi carrier method is used with the double Fourier series for the analysis of output power harmonics characteristic. Simulation was performed by PSIM, and the harmonics characteristics of 3-level inverter in each region are analyzed. The side band harmonics of carrier frequency are dominant in the linear region, but these harmonic components are decreased as the inveter goes to overmodulation region, and the harmonics due to the fundamental frequency is increased gradually at the same time. The harmonic analyses are verified through the simulation and experimental results under the same condition.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.196-198
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• 2007

In the substations for traction systems and the large-scale discharging system of secondary batteries, the voltage of DC bus line goes up by the regenerated energy and the energy is usually wasted in resistor for system stability. This paper proposes the DC power regenerating system using a three phase PWM inverter. The proposed system can regenerate the excessive DC power from DC bus line to AC supply and control the power factor of AC supply to unity. To implement unity power factor, the magnitude of the inverter output voltage should be higher than that of AC supply and therefore SVPWM technique is adopted. Computer simulations are carried out to verify the validity of the proposed system.