• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.8
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• pp.744-751
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• 2003

Co-Pd alloy thin films prepared by a DC-sputter that have self-organized nano structure(SONS), are promising for high-density information storage media in information era. We prepared the samples by varying Pd contents of 0~8.1 wt% at the substrate temperatures of room temperature (RT) and 200 $^{\circ}C$, respectively Microstructure and Pd contents of the Co$_{1-x}$ Pd$_{x}$ films are probed by a scanning electron microscope (SEM), a transmission electron microscope (TEM) and an energy dispersive spectrometer (EDS). We also investigated the saturation magnetization (Ms), remanence and coercivity of the Co$_{1-x}$ Pd$_{x}$ films. Surface roughness are measured by an atomic force microscope (AFM). We revealed that self-organized nano size Co-enriched phase and Pd-enriched phase existed with Pd contents at the substrate temperatures of RT and 20$0^{\circ}C$ through microstructure characterization. SONS helped to keep the saturation magnetization and enhance the perpendicular anisotropy with Pd contents. Out result implies that we may tune the perpendicular magnetic properties with keeping the saturation magnetization by varying substrate temperatures and Pd contents for high density magnetic recording.rding.

• Proceedings of the KIEE Conference
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• 1996.11a
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• pp.200-202
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• 1996

MgO film was deposited on the glass substrate by the hollow cathode discharge ion plating method and the characteristics of the MgO thin film such as deposition rate, crystalline orientation, surface morphology and secondary electron coefficient were investigated. The deposition rate of MgO thin films were $430^{\sim}1270{\AA}$/min at various temperatures and biases. The crystalline orientation of the MgO thin film changed from (200) to (220) upon increasing the HCD current from 100A to 200A. These results indicated that the crystallin orientation of the MgO thin film was determined by the super-saturation ratio. The (200) peak decreased and the (220) peak increased as the substrate bias increased, while both peaks increased as the substrate temperature increased. The grain size increased as the substrate bias increased and the secondary electron emission coefficient increased as the substrate bias increased.

• Korean Journal of Materials Research
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• v.15 no.11
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• pp.741-744
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• 2005

Atomic layer deposition (ALD) is a very promising deposition technique for ZnO thin films. However, there have been very few reports on ZnO grown by ALD. Effects of substrate temperature in both ALD and post annealing on the microstructure and PL properties of ZnO thin films were investigated using X-ray diffraction, photoluminescence, and scanning electron microscopy. The temperature window of ALD is found to be between $130-180^{\circ}C$. The growth rate of ZnO thin film increases as the substrate temperature increases in the temperature range except the temperature window. The crystal quality depends most strongly on the substrate temperature among all the growth parameters of ALD. The crystallinity of the film is improved by increasing the growth thine per ALD cycle or doing post-annealing treatment. The grain size of the film tends to increase and the grain shape tends to change from a worm-like longish shape to a round one as the annealing temperature increases from $600^{\circ}C\;to\;1,000^{\circ}C$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.1
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• pp.39-43
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• 2021

In the case of ZnO:Al thin films, it is the best material that can replace ITO that is mainly used as a transparent electrode in electronic devices such as solar cells and flat-panel displays. In this study, ZnO:Al films were fabricated by using the RF dual magnetron sputtering method at various substrate temperatures. As the substrate temperature increased, the crystallinity of the ZnO:Al thin films was improved, and the electrical conductivity and electrical properties of the thin film improved owing to the increase in grain size. In addition, the surface roughness of the ZnO:Al thin films increased due to changes in the surface and density of the thin films. Moreover, the substrate temperature increased the density of thin films and improved their transmittance. To be applied to solar cells and other several electronic devices in the future, the hardness and adhesion properties of the thin film improve as the substrate temperature increases.

• Journal of the Korean Ceramic Society
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• v.30 no.8
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• pp.657-663
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• 1993

BaTiO3 sputtering targets of 3 inch diameter were prepared by sintering the CIP (Cold Isotatic Pressing) compacts at 136$0^{\circ}C$ for 3hrs. The apparent density and grain size were 97% and 30${\mu}{\textrm}{m}$, respectively. After BaTiO3 films were deposited on Si and Pt/Ti/SiO2/Si substrates using these targets, films were annealed at various conditions and the crystallization behavior, reaction with the substrate and the electrical properties were investigated. The films on both substrates required 5~20hrs furnace annealing for crystallization at the temperatures from $600^{\circ}C$ to 80$0^{\circ}C$. For the films on Si substrate, interaction between the film and the substrate was suppressed upt o $700^{\circ}C$ for 10 hrs and the relative dielectric constant was 30. As the annelaing temperature and time were increased, the relative dielectric constants of the films decreased due to the formation of silicate phases through the reaction with the substrate. For the BaTiO3 films on Pt/Ti/SiO2/Si substrate, the reaction with the substrate was further reduced when the annealing condition was identical to that for Si substrate, but the reaction between the layers in Pt electrode took place above $700^{\circ}C$. When the films were annealed at $600^{\circ}C$ where the stability of Pt electrode was sustained, relative dielectric constant was increased to 110 since the reaction with substrate was effectively reduced even for a longer annealing time and the crystallization was enhanced.

• Tribology and Lubricants
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• v.37 no.4
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• pp.144-150
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• 2021

The most cost-effective method of reducing abrasive wear in mechanical parts is increasing their hardness with thin hard coatings. In practice, the composite hardness of the coated substrate is more important than that of the substrate or coating. After full unloading of the load applied to an indenter, its indentation hardness evaluated based on the dent created on the test piece was almost dependent on plastic deformation of the substrate. Following the first part of this study, which proposes a new Brinell hardness test method for a coated surface, the remainder of the study is focused on practical application of the method. Indentation analyses of a rigid sphere and elastic-perfect plastic materials were performed using finite element analysis software. The maximum principal stress and plastic strain distributions as well as the dent shapes according to the substrate yield stress and coating thickness were compared. The substrate yield stress had a significant effect on the dent size, which in turn determines the Brinell hardness. In particular, plastic deformation of the substrate produced dents regardless of the state of the coating layer. The hardness increase by coating behaved differently depending on the substrate yield stress, coating thickness, and indentation load. These results are expected to be useful when evaluating the composite hardness values of various coated friction surfaces.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.25 no.6
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• pp.280-284
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• 2015

Au doped $TiO_2$ nanoparticles have been synthesized using a reverse micelle technique combined with metal alkoxide hydrolysis and condensation. Au doped $TiO_2$ was coated with glass substrate. The size of the particles and thickness of the coating can be controlled by manipulating the relative rates of the hydrolysis and condensation reaction of TTIP within the micro-emulsion. The average size of synthesized Au doped $TiO_2$ nanoparticle was about in the size range of 15 to 25 nm and the Au particles formed mainly the range of 2 to 10 nm in diameter. The effect of synthesis parameters, such as the molar ratio of water to TTIP and the molar ratio of water to surfactant, are discussed. The synthesized nanopaticles were coated on glass substrate by a spin coating process. The thickness of thin film was about 80 nm. The degradation of MB on a $TiO_2$ thin film was enhanced over 20 % efficiency by the incorporation of Au.

• Journal of the Korean Society for Precision Engineering
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• v.25 no.9
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• pp.32-37
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• 2008

Freestanding hydride vapor phase epitaxy grown GaN(Gallium Nitride) substrates subjected to various polishing methods were characterized for their surface and subsurface conditions, Although CMP(Chemical Mechanical Polishing) is one of the best approaches for reducing scratches and subsurface damages, the removal rate of Ga-polar surface in CMP is insignificant($0.1{\sim}0.3{\mu}m$/hr) as compared with that of N-polar surface, Therefore, conventional MP(Mechanical Polishing) is commonly used in the GaN substrate fabrication process, MP of (0001) surface of GaN has been demonstrated using diamond slurries with different abrasive sizes, Diamond abrasives of size ranging from 30nm to 100nm were dispersed in ethylene glycol solutions and mineral oil solutions, respectively. Significant change in the surface roughness ($R_a$ 0.15nm) and scratch-free surface were obtained by diamond slurry of 30nm in mean abrasive size dispersed in mineral oil solutions. However, MP process introduced subsurface damages confirmed by TEM (Transmission Electronic Microscope) and PL(Photo-Luminescence) analysis.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.1
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• pp.70-77
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• 1999

A miniaturized voltage controlled oscillator using multi-layer ceramic technology at PCS frequency band is designed and fabricated. To improve the phase noise characteristics and to reduce the size, the strip line which is embedded in a high performance multi-layer ceramic substrate is used as an inductor of VCO. And the fabricated VCO is very small size ($6mm\times6mm\times2mm$). At the bias condition of 3.3 V and 9mA, the output power and phase noise in the operating frequency range of 1,720~1,780 MHz are -3.7 dBm and -95 dBc/Hz at 10 KHz offset from the carrier, respectively. The phase noise and size are better than the conventional VCO using glass epoxy substrate.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.05a
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• pp.138-141
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• 2002

There are continuous efforts in the electronics industry to a reduced electronic package size. Reducing the size of electronic packages can be achieved by a variety of means, and for ball grid array(BGA) packages an effective method is to decrease the pitch between the individual balls. Chip scale package(CSP) and BGA are now one of the major package types. However, a reduced package size has the negative effect of reducing board-level reliability. The reliability concern is for the different thermal expansion rates of the two-substrate materials and how that coefficient CTE mismatch creates added stress to the BGA solder joint when thermal cycled. The point of thermal fatigue in a solder joint is an important factor of BGA packages and knowing at how many thermal cycles can be ran before failure in the solder BGA joint is a must for designing a reliable BGA package. Reliability of the package was one of main issues and underfill was required to improve board-level reliability. By filling between die and substrate, the underfill could enhance the reliability of the device. The effect of underfill on various thermomechanical reliability issues in $\mu$BGA packages is studied in this paper.