• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.353-353
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• 2010

본 논문에서는 소스와 드레인의 형성에 있어서 implantation 이 아닌 silicide를 형성시켜서 최고온도 $500^{\circ}C$가 넘지않는 저온공정을 실현하였고, silicon-on-insulator (SOI) 기판이 아닌 solid phase crystallization (SPC) 결정화 방법을 이용하여 결정화 시킨 SPC-TFT 기판을 사용하였다. Silicide 의 형성은 pt를 증착하여 furnace에서 열처리를 실시하여 형성하였다.

• Journal of the Korean Vacuum Society
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• v.12 no.3
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• pp.168-173
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• 2003

Recently, according to the rapid progress in Flat-panel-display industry, there has been a growing interest in the poly-Si process. Compared with a-Si, poly-Si offers significantly high carrier mobility, so it has many advantages to high response rate in Thin Film Transistors (TFT's). We have investigated a new process for the high temperature Solid Phase Crystallization (SPC) of a-Si films without any damages on glass substrates using thin film heater. because the thin film heater annealing method is a very rapid thermal process, it has very low thermal budget compared to the conventional furnace annealing. therefore it has some characteristics such as selective area crystallization, high temperature annealing using glass substrates. A 500 $\AA$-thick a-Si film was crystallized by the heat transferred from the resistively heated thin film heaters through $SiO_2$ intermediate layer. a 1000 $\AA$-thick $TiSi_2$ thin film confined to have 15 $\textrm{mm}^{-1}$ length and various line width from 200 to 400 $\mu\textrm{m}$ was used as the thin film heater. By this method, we successfully crystallized 500 $\AA$-thick a-Si thin films at a high temperature estimated above $850^{\circ}C$ in a few seconds without any thermal deformation of g1ass substrates. These surprising results were due to the very small thermal budget of the thin film heaters and rapid thermal behavior such as fast heating and cooling. Moreover, we investigated the time dependency of the SPC of a-Si films by observing the crystallization phenomena at every 20 seconds during annealing process. We suggests the individual managements of nucleation and grain growth steps of poly-Si in SPC of a-Si with the precise control of annealing temperature. In conclusion, we show the SPC of a-Si by the thin film heaters and many advantages of the thin film heater annealing over other processes

• Journal of Convergence for Information Technology
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• v.9 no.5
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• pp.117-124
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• 2019

This paper discusses recent trends in the fabrication of semiconducting materials among the components of thin film transistors used in AMOLED display. In order to obtain a good semiconductor film, it is necessary to change the amorphous silicon into polycrystalline silicon. There are two ways to use laser and heat. Laser-based methods include sequential lateral solidification (SLS), excimer laser annealing (ELA), and thin-beam directional crystallization (TDX). Solid phase crystallization (SPC), super grain silicon (SGS), metal induced crystallization (MIC) and field aided lateral crystallization (FALC) were crystallized using heat. We will also study research for manufacturing large AMOLED displays.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.1
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• pp.26-32
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• 2003

Then-channel poly-Si thin-film transistors (poly-Si TFT's) formed by solid phase crystallization (SPC) method on glass were measured to obtain the electrical parameters such as of I-V characteristics, mobility, leakage current, threshold voltage, and subthreshold slope. Then, devices were analyzed to obtain the reliability and appliability on TFT-LCD with large-size and high density. In n-channel poly-Si TFT with 5$\mu\textrm{m}$/2$\mu\textrm{m}$, 8$\mu\textrm{m}$, 30$\mu\textrm{m}$ devices of channel width/length, the field effect mobilities are 111, 116, 125 $\textrm{cm}^2$/V-s and leakage currents are 0.6, 0.1, and 0.02 pA/$\mu\textrm{m}$, respectively. Low threshold voltage and subthreshold slope, and good ON-OFF ratio are shown, as well. Thus. the poly-Si TFT's used by SPC are expected to be applied on TFT-LCD with large-size and high density, which can integrate the display panel and peripheral circuit on a targe glass substrate.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.279.1-279.1
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• 2016

박막 트랜지스터 (thin film transistor, TFT)는 고밀도, 대면적화로 높은 전자의 이동도가 요구되면서, 비정질 실리콘 (a-Si)에서 다결정 실리콘 (poly-Si) TFT 로 연구되었다. 이에 따라 비정질 실리콘에서 결정질 실리콘으로의 상변화에 대한 결정화 연구가 활발히 진행되었다. 또한, 박막 태양전지 분야에서도 유리기판 위에 비정질 층을 증착한 후에 열처리를 통해 상변화하는 고상 결정화 (solid-phase crystallization, SPC) 기술을 적용하여, CSG (thin-film crystalline silicon on glass) 태양전지를 보고하였다. 이러한 비정질 실리콘 층의 결정화 기술을 결정질 실리콘 태양전지 에미터 형성 공정에 적용하고자 한다. 이 때, 플라즈마화학증착 (Plasma-enhanced chemical vapor deposition, PECVD) 장비로 증착된 비정질 실리콘 층의 열처리를 통한 결정화 정도가 중요한 요소이다. 따라서, 비정질 실리콘 층의 결정화에 영향을 주는 인자에 대해 연구하였다. 비정질 실리콘 증착 조건(H2 가스 비율, 도펀트 유무), 실리콘 기판의 결정방향, 열처리 온도에 따른 결정화 정도를 엘립소미터(elipsometer), 투과전자현미경 (transmission electron microscope, TEM), 적외선 분광기 (Fourier Transform Infrared, FT-IR) 측정을 통하여 비교 하였다. 이를 기반으로 결정화 온도에 따른 비정질 실리콘의 결정화를 위한 활성화 에너지를 계산하였다. 비정질 실리콘 증착 조건 보다 기판의 결정방향이 결정화 정도에 크게 영향을 미치는 것으로 확인하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.356-356
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• 2010

In this paper, Poly silicon thin-film transistors (poly-Si TFTs) with employed the SPC (Solid phase crystallization) and ELA (Excimer laser annealing) methods on glass panel substrate are fabricated to investigate the electrical poperies. Poly-Si TFTs have recess-channel structure with formated source/drain regions by LPCVD n+ poly Si in low $650^{\circ}C$ temperature. the ELA-TFT show higher on/off current ratio and subthreshold swing than a-Si and SPC TFT that therefore, these results showed that the ELA-TFT might be beneficial for practical embedded TFT memory device application.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.1
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• pp.1-4
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• 2008

The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.199-199
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• 2008

이 실험은 NVM의 Oxide, Nitride, Oxide nitride층별 blocking, trapping and tunneling 속성에 대해서 밝히고자 한다. gate 전극은 값싸고 전도도가 좋은 알루미늄을 사용한다. 유리기판위에 Silicon nitride층을 20nm로 코팅하고 Silicon dioxide층을 10nm로 코팅한다. 그리고 amorphous Silicon material이 증착된다. Poly Silicon은 Solid Phase Crystallization 방법을 사용하였다. 마지막 공정으로 p-doping은 ion shower에 의한 방법으로 drain과 source 전극을 생성하였다. gate가 biasing 될 때, p-channel은 source와 drain 사이에서 형성된다. Oxide Nitride Oxide nitride (ONO) 층은 각각 12.5nm/20nm/2.3nm의 두께로 만들었다. 전하는 Program process 중에 poly Silicon층에서 Silicon Oxide nitride tunneling층을 통하여 움직이게 된다. 그리고 전하들은 Silicon Nitride층에 머무르게 된다. 그 전하들은 erasing process 중에 trapping 층에서 poly Silicon 층으로 되돌아 간다. Silicon Oxide blocking층은 trapping층으로 전하가 나가는 것을 피하기 위하여 더해진다. 이 논문에서 Programming process와 erasing process의 Id-Vg 특성곡선을 설명한다. Programming process에 positive voltage를 또는 erasing process에 negative voltage를 적용할 때, Id-Vg 특성 곡선은 왼쪽 또는 오른쪽으로 이동한다. 이 실험이 보여준 결과값에 의해서 10년 이상의 저장능력이 있는 메모리를 만들 수 있다. 그러므로, NVM의 중요한 두 가지 성질은 유지성과 내구성이다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.345-345
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• 2010

1T-DRAM cell with solid phase (SPC) crystallized poly-Si thin film transistor was fabricated and electrical characteristics were evaluated. The fabricated device showed kink effect by negative back bias. Kink current is due to the floating body effect and it can be used to memory operation. Current difference between "1" state and "0" state was defined and the memory properties can be improved by using gate induced drain leakage (GIDL) current.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.6
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• pp.462-465
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• 2009

Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method, The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than 10), Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.