• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.10
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• pp.32-38
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• 2003

This works reports the measurement and analysis results on the hot electron induced device degradation in Gate-All-Around SOI MOSFET's, which were fabricated using commercially available SIMOX material. It is observed that the worst-case condition of the device degradation in nMOSFETs is $V_{GS}$ = $V_{TH}$ due to the higher impact ionization rate when the parasitic bipolar transistor action is activated. It is confirmed that the device degradation is caused by the interface state generation from the extracted degradation rate and the dynamic transconductance measurement. The drain current degradation with the stress gate voltages shows that the device degradation of pMOSFETs is dominantly governed by the trapping of hot electrons, which are generated in drain avalanche hot carrier phenomena.r phenomena.

• Journal of Sensor Science and Technology
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• v.7 no.4
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• pp.225-233
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• 1998

The principle, design, and application of a gear-tooth sensor for the rough environmental conditions such as high temperatures of up to $150^{\circ}C$ are studied. The rotation of a tooth wheel is detected by a couple of Hall elements manufactured on the SIMOX wafer by a methode of differential detection using bipolar silicon technology. The product sensitivity of the Hall element is about 510 V/AT over a wide temperature range of $-40^{\circ}C{\sim}150^{\circ}C$. The differential Hall sensor makes the maximum possible distance between sensor and tooth wheel wider than that when single Hall element is used over a wide temperature range, and the maximum detectable distance is 4.5mm at driving current of 4mA.

• Korean Journal of Materials Research
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• v.15 no.9
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• pp.613-619
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• 2005

The ever increasing popularity and acceptance in the market place of portable systems, such as cell phones, PDA, notebook PC, etc., are fueling effects in further miniaturizing and lowering power consumption in these systems. The dynamic power consumption due to the CPU activities and the static power consumption due to leakage currents are two major sources of power consumption. Smaller devices and a lower de voltage lead to reducing the power requirement, while better insulation and isolation of devices lead to reducing leakage currents. All these can be harnessed in the SOI (silicon-on-insulator) technology. In this study, the key aspects of the SOI technology, mainly device electrical properties and device processing steps, are briefly reviewed. The interesting materials issues, such as SOI structure formation and SOI wafer fabrication methods, are then surveyed. In particular, the recent technological innovations in two major SOI wafer fabrication methods, namely wafer bonding and SIMOX, are explored and compared in depth. The results of the study are nixed in that, although the quality of the SOI structures has shown great improvements, the processing steps are still found to be too complex. Between the two methods, no clear winner has yet emerged in terms of the product quality and cost considerations.

• Proceedings of the Korean Vacuum Society Conference
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• 1996.02a
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• pp.38-39
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• 1996

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1286-1288
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• 1997

In this study, partially-depleted SOI MOSFET with multi-gate was fabricated on p-type SIMOX(Seperation by Implanted Oxygen). As increase the number of its gate, increase the breakdown voltage. But kink effect was not affected by the number of its gate. However, it is known that the asymmetric gate structure reduce kink effect. So if asymmetric multi-gate applied to partially-depleted SOI MOSFET, it is expected that the breakdown voltage of SOI MOSET with asymmetric multi-gate is higher than that of SOI MOSFET with single gate and that kink effect is reduced by SOI MOSFET with asymmetric multi-gate.

• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.208-211
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• 1997

We have fabricated a single-electron-tunneling(SET) transistor with a dual gate geometry based on the SOI structure prepared by SIMOX wafers. The split-gate is the lower-gate is the lower-level gate and located ∼ 100${\AA}$ right above the inversion layer 2DEG active channel, which yields strong carrier confinement with fully controllable tunneling potential barrier. The transistor is operating at low temperatures and exhibits the single electron tunneling behavior through nano-size quantum dot. The Coulomb-Blockade oscillation is demonstrated at 15mK and its periodicity of 16.4mV in the upper-gate voltage corresponds to the formation of quantum dots with a capacity of 9.7aF. For non-linear transport regime, Coulomb-staircases are clearly observed up to four current steps in the range of 100mV drain-source bias. The I-V characteristics near the zero-bias displays typical Coulomb-gap due to one-electron charging effect.

• Journal of the Korean Vacuum Society
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• v.4 no.S2
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• pp.69-74
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• 1995

The effects of TCA incorporation during annealing process on the SIMOX quality is studied. Silicon wafers are implanted with heavy dose of oxygen ions, and are annealed at $1300^{\circ}C$ for 4 hours. The annealing process is splitted into three conditions due to some differences of low temperature preliminary annealing step which are without pre-annealing step. The specimens are analyzed by several methods, such as AES, XTEM, and TRXFA. TCA incorporation during pre-annealing step is effective in dislocation density reduction and heavy metal content reduction.

• Journal of Mechanical Science and Technology
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• v.19 no.8
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• pp.1544-1553
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• 2005

In this article, a micro cantilever array actuated by PZT films is designed and fabricated for micro fluidic systems. The design features for maximizing tip deflections and minimizing fluid leakage are described. The governing equation of the composite PZT cantilever is derived and the actuating behavior predicted. The calculated value of the tip deflection was 15 ${\mu}m$ at 5 V. The fabrication process from SIMOX (Separation by oxygen ion implantation) wafer is presented in detail with the PZT film deposition process. The PZT films are characterized by investigating the ferroelectric properties, dielectric constant, and dielectric loss. Tip deflections of 12 ${\mu}m$ at 5 V are measured, which agreed well with the predicted value. The 18 ${\mu}l/s$ leakage rate of air was observed at a pressure difference of 1000 Pa. Micro cooler is introduced, and its possible application to micro compressor is discussed.