• The Transactions of the Korea Information Processing Society
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• v.7 no.8
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• pp.2484-2496
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• 2000

High speed switches have been developing to interconnect a large number of nodes. It is important to analyze the switch performance under various conditions to satisfy the requirements. Queueing analysis, in general, has the intrinsic problem of large state space dimension and complex computation. In fact, The petri net is a graphical and mathematical model. It is suitable for various applications, in particular, manufacturing systems. It can deal with parallelism, concurrence, deadlock avoidance, and asynchronism. Currently it has been applied to the performance of computer networks and protocol verifications. This paper presents a framework for modeling and analyzing ATM switch using stochastic activity networks (SANs). In this paper, we provide the ATM switch model using SANs to extend easily and an approximate analysis method to apply A TM switch models, which significantly reduce the complexity of the model solution. Cell arrival process in output-buffered Queueing A TM switch with finite buffer is modeled as Markov Modulated Poisson Process (MMPP), which is able to accurately represent real traffic and capture the characteristics of bursty traffic. We analyze the performance of the switch in terms of cell-loss ratio (CLR), mean Queue length and mean delay time. We show that the SAN model is very useful in A TM switch model in that the gates have the capability of implementing of scheduling algorithm.

• Journal of Advanced Technology Convergence
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• v.2 no.3
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• pp.9-15
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• 2023

Recently, various public services are being performed based on information systems as the informatization business spreads. Public administration services based on these information systems provide internal and external services. In recent years, as the construction of cloud-based public services has been expanded, the advancement of information systems has attracted attention. In particular, as the dependence on information systems increases, the establishment of a response system to prevent dangerous situations such as interruption and paralysis of information systems in advance has become a hot topic not only in companies but also in public institutions. Therefore, in this paper, a disaster recovery system was designed and built to maximize the efficiency of system operation and shorten recovery time through service conversion automation of the disaster recovery system. The integrated DR server redundancy test, web server redundancy test, FC-IP redundancy test, and SAN switch redundancy test were performed respectively by applying the disaster recovery system designed and built according to the method proposed in the paper.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.954-955
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• 2015

본 논문에서는 기존 직렬결합 커패시터 입력단을 갖는 7-레벨 인버터에 커패시터 전압균형 제어법을 적용하여 출력 전압의 중간레벨 구간이 제대로 형성되지 않는 문제점을 해결하고자 한다. 기존에 제시된 직렬결합 커패시터 입력단 구성을 갖는 7-레벨 인버터는 2개의 양방향 스위치모듈과 3개의 직렬 연결된 커패시터를 이용한 변형된 Cascaded H-bridge 인버터이다. 기존 논문에서는 입력 전압원으로부터 3개의 직렬 연결된 커패시터의 충전을 통해 레벨을 형성하는 과정에서 커패시터 전압불균형 문제를 해결하지 못하여 결국 출력전압레벨이 7-레벨에서 5-레벨로 감소하는 것을 볼 수 있다. 본 논문에서는 세 개의 직렬결합된 커패시터중 중앙에 위치한 커패시터의 충 방전량을 조절하여 커패시터 전압불균형 문제를 해결한다. 제어법의 타당성은 PSIM 기반의 컴퓨터 시뮬레이션을 통하여 기존 스위칭 제어법과 비교하여 검증한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38C no.3
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• pp.247-253
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• 2013

This paper analyzes ship area network(SAN) with integrated gateway. For the analysis, this paper analyzes reference network architecture, end-to-end connection model, traffic model, and requirement of SAN. Also, the type of network element and minimum performance of integrated gateway is derived by ship area network simulator. The performance evaluation results show that a integrated gateway operating as network switch with performance over than 30,000 packets/sec can provides end-to-end connection with satisfaction of requirement of each end-to-end connection.

• Journal of KIISE:Computing Practices and Letters
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• v.10 no.2
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• pp.134-145
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• 2004

With rapid growth in the amount of data transferred on the Internet, traditional storage systems have reached the limits of their capacity and performance. SAN (Storage Area Network), which connects hosts to disk with the Fibre Channel switches, provides one of the powerful solutions to scale the data storage and servers. In this environment, the maintenance of data consistency among hosts is an important issue because multiple hosts share the files on disks attached to the SAN. To preserve data consistency, each host can execute the disk I/O whenever disk read and write operations are requested. However, frequent disk I/O requests cause the deterioration of the overall performance of a SAN cluster. In this paper, we introduce a SANtopia global buffer manager to improve the performance of a SAN cluster reducing the number of disk I/Os. We describe the design and algorithms of the SANtopia global buffer manager, which provides a buffer cache sharing mechanism among the hosts in the SAN cluster. Micro-benchmark results to measure the performance of block I/O operations show that the global buffer manager achieves speed-up by the factor of 1.8-12.8 compared with the existing method using disk I/O operations. Also, File system micro-benchmark results show that SANtopia file system with the global buffer manager improves performance by the factor of 1.06 in case of directories and 1.14 in case of files compared with the file system without a global buffer manager.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.2017-2019
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• 2004

본 논문에서는 S/C-밴드(2${\sim}$8GHz)에서 동작하는 초광대역 주파수 합성기를 설계하였다. 먼저 S-밴드(2-4GHz) 광대역 전압제어발진기를 가지고 획득시간을 단축하기 위한 연산 증폭기를 사용한 DA변환기와 능동루프 필터(Active Loop Filter)로 구성된 S-밴드 주파수 합성기를 설계하였다. 그리고 주파수 체배기, SPDT RF 스위치를 통합하여 최종적으로 S/C-밴드 초광대역 주파수 합성기를 설계하였다. 제작된 주파수 합성기는 200kHz 비교주파수에서 위상잡음은 100kHz 옵셋 주파수에서 -92dBc/Hz이하, 불요주파수 특성은 -62.33dBc 이하, 획득시간은 1.3ms 이하로 측정되었다.

• Proceedings of the Korea Information Processing Society Conference
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• 2003.11b
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• pp.923-926
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• 2003

iSCSI(Internet Small Computer Systems Interface)프로토콜은 TCP/IP 네트워크를 통해 블록 중심형 스토리지 데이터에 접근을 가능하게 하는 SCSI 전송프로토콜이다. iSCSI는 서버에서 스토리지장치로의 데이터 전송을 위해 표준 이더넷 스위치와 라우터를 사용하며, 또한 기존의 IP 네트워크를 사용하여 SAN 의 확장이 가능하다. 본 논문에서는 이러한 iSCSI 를 사용하여 여러가지 다른 환경에서 iSCSI 프로토콜의 성능을 분석한다. 첫째는 스토리지 장치에 따른 iSCSI 의 성능변화와 둘째는 현재의 네트웍 망에서의 변화이다. 이더넷에서 스토리지 데이터를 액세스하는데 있어서 시급했던 문제중에 하나는 충분한 대역폭과 낮은 지연율을 제공하는 것이었다. 최근의 이더넷 기술의 발전은 IP 네트워크를 통해 스토리지 장치를 액세스하는 것이 가능해졌으며 백본망을 비롯한 기가비트 이더넷이 활성화된 오늘날의 네트워크 망에서 iSCSI를 이용한 스토리지 서비스가 활성화 될 것이다. 본 논문에서는 iSCSI의 기반이 되는 IP네트워크에서의 iSCSI의 성능을 분석한 내용을 기술한다.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.385-386
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• 2017

본 논문에서는 직렬로 결합된 세 개의 커패시터를 입력 전압원으로 하는 7-레벨 인버터의 입력 커패시터 전압이 불균형을 이루는 원인을 분석하고 전압 균형 제어를 적용하여 7-레벨의 출력 전압을 생성하는 방법에 대하여 제안한다. 직렬로 결합된 커패시터에서 전압 불균형이 발생되는 기본적인 원인은 커패시터의 충 방전 시간에 대한 불평형이며 이는 양방향 제어가 가능한 스위치의 ON/OFF 듀티폭 제어를 통해 해결이 가능하다. 제안하는 제어법의 타당성 검증을 위해서 제안하는 전압 균형제어 적용 전후에 대한 시뮬레이션 및 실험 결과를 제시한다.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.271-272
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• 2015

본 논문은 무손실 스너버 회로를 적용함으로써 스위치의 온/오프 시 발생하는 스위칭 손실을 저감시킬 뿐만 아니라 출력 다이오드의 역 회복 특성을 개선하여 보다 향상된 효율을 갖는 강압형 컨버터를 제안한다. 또한 스위칭 손실을 줄여 고 주파수 구동을 가능하게 하고, 이를 통해 전원회로의 고 전력밀도 구현을 목적으로 하고 있다. 제안된 무손실 스너버의 타당성 검증을 위해 이론적 분석과 실험결과를 제시한다.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.5
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• pp.219-231
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• 2005

Many applications in cluster computing require QoS (Quality of Service) services. Since performance predictability is essential to provide QoS service, underlying systems must provide predictable performance guarantees. One way to ensure such guarantees from network subsystems is to generate global schedules from applications'network requests and to execute the local portion of the schedules at each network interface. To ensure accurate execution of the schedules, it is essential that a global time base must be maintained by local clocks at each network interface. The task of providing a single time base is called a synchronization problem and this paper addresses the problem for system area networks. To solve the synchronization problem, FM-QoS (1) proposed a simple synchronization mechanism called FBS(Feedback-Based Synchronization) which uses built-in How control signals. This paper extends the basic notion of FM-QoS to a theoretical framework and generalizes it: 1) to identify a set of built-in network flow control signals for synchrony and to formalize it as a synchronizing schedule, and 2) to analyze the synchronization precision of FBS in terms of flow control parameters. Based on generalization, two application classes are studied for a single switch network and a multiple switch network. For each class, a synchroniring schedule is proposed and its bounded skew is analyzed. Unlike FM-QoS, the synchronizing schedule is proven to minimize the bounded skew value for a single switch network. To understand the analysis results in practical networks, skew values are obtained with flow control parameters of Myrinet-1280/SAN. We observed that the maximum bounded skew of FBS is 9.2 Usec or less over all our experiments. Based on this result, we came to a conclusion that FBS was a feasible synchronization mechanism in system area networks.