• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 B
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• pp.890-893
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• 1999

The intent of this paper is to describe a neural network structure called dynamic neural processor(DNP), and examine how it can be used in developing a learning scheme for computing robot inverse kinematic transformations. The architecture and learning algorithm of the proposed dynamic neural network structure, the DNP, are described. Computer simulations are demonstrate the effectiveness of the Proposed learning using the DNP.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 26-27 Oct. 1990
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• pp.923-928
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• 1990

This paper describes the design and implementation of a real-time, high-precision vision system and its application to SMT(surface mounting technology) automation. The vision system employs a 32 bit MC68030 as a main processor, and consists of image acquisition unit. DSP56001 DSP based vision processor, and several algorithmically dedicated hardware modules. The image acquisition unit provides 512*480*8 bit image for high-precision vision tasks. The DSP vision processor and hardware modules, such as histogram extractor and feature extractor, are designed for a real-time excution of vision algorithms. Especially, the implementation of multi-processing architecture based on DSP vision processors allows us to employ more sophisticated and flexible vision algorithms for real-time operation. The developed vision system is combined with an Adept Robot system to form a complete SMD system. It has been found that the vision guided SMD assembly system is able to provide a satisfactory performance for SND automation.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 2003년도 가을 학술발표논문집 Vol.30 No.2 (3)
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• pp.343-345
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• 2003

현재 대부분의 로봇 제어용 네트웍으로는 FieldBus 등이 사용되고 있다. 그러나 로봇 시스템의 고성능화와 다양한 기능으로 인하여 기존의 FieldBus가 제공하던 기능으로는 대역폭에서나 성능면에서 부족한 점이 나타나고 있다. IEEE1394는 이러한 로봇 제어용 네트웍에 매우 적합한 특성을 갖고 있다. 본 논문에서는 IEEE1394가 로봇 제어용 네트웍에 사용될 때 가질 수 있는 실시간성과 신뢰성 특징에 대해 분석해보고, IEEE1394의 특성을 잘 살릴 수 있는 제어용 소프트웨어 구조에 대해 연구하고 이를 구현한다. 실시간성 데이터를 위해서는 우선순위 큐를 이용한 패킷 전송방법을, 주기적 데이터를 위해서 등시성 전송방법을 이용한다.

• 한국정보전자통신기술학회논문지
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• 제10권2호
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• pp.192-197
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• 2017

본 논문은 저전력 영상 특징 추출 하드웨어 설계를 위한 공통 부분식 제거 기법 기반 이미지 필터 하드웨어 최적화 기법을 제안한다. 저전력 및 고성능 물체인식 하드웨어는 공장 자동화를 위한 산업용 로봇에 필수 모듈로 채택되고 있다. 따라서 물체인식 하드웨어의 영상 특징 추출 알고리즘에 다양하게 적용되는 Gaussian gradient 필터 하드웨어의 저면적 설계가 필수적이다. Gaussian gradient 필터의 하드웨어 복잡도를 줄이기 위해 필터에 사용되는 계수의 Symmetric한 특징과 Transposed form FIR 필터 하드웨어 구조를 이용했다. 제안된 이미지 필터의 하드웨어 구조는 알고리즘에 적용된 계수의 변형 없이 구현되었기 때문에 윤곽선 검출 알고리즘에 적용했을 때 검출 데이터의 열화 없이 구현될 수 있다. 제안된 이미지 필터 하드웨어 구조는 기존 구조와 비교했을 때 곱셈기의 수를 50% 절감할 수 있음을 확인했다.

• 한국건축시공학회지
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• 제22권6호
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• pp.689-700
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• 2022

건축물 골조공사에서 먹매김 작업은 건축물 구조부재 요소를 정확한 위치에 시공하기 위해 높은 정밀도가 요구되나, 현재 인력에 의해서 진행되어 작업자의 숙련도에 따라 먹 위치 정확도 및 정밀도가 저하되고, 정보손실 및 오류 발생에 따른 생산성 저하 문제점을 갖는다. 이를 해결하기 위해 전반적인 먹매김 공정의 자동화 및 정보화 기술 도입이 요구되며, 건설로봇을 활용한 먹매김 자동화는 효과적인 수단이 될 수 있다. 이에 본 연구에서는 건축물 골조공사의 먹매김 시공자동화 로봇의 프로토타입을 개발하고 기초성능을 평가하였다. 개발된 로봇은 크게 주행부, 마킹부, 센싱부, 제어부로 구성되었으며, 골조공사 환경을 고려하여 다양한 주행방식과 마킹부 이동 및 회전이 가능하도록 설계되었다. 주행 및 마킹 성능 실험 결과, 주행거리 오차 및 마킹 품질측면에서는 만족할 만한 성능을 보였으나, 일부 주행방식과 마킹 정밀도 측면에서의 개선 필요성이 확인되었다. 본 연구결과를 토대로 개발 장비의 지속적인 개선 및 성능 보완, 전체 먹매김 공정의 자동화 시스템 구축을 진행하고자 한다.

• 전자공학회논문지S
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• 제36S권1호
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• pp.29-37
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• 1999

일반적으로 신경망의 정보처리 능력은 신경망의 구조와 효율적인 학습패턴에 의해 결정된다. 그러나 아직까지 체계적으로 신경망의 구조를 설계하거나 효율적인 학습패턴을 선택하는 방법은 없다. 한편 진화 알고리즘은 개체군을 이용한 탐색법으로 전역적 최적해를 구하는 데 많이 사용되고 있으며, 특히 최적의 시스템을 설계하고자 할 때 매우 유용한 방법이다. 본 논문에서는 유전자 알고리즘으로 구성된 두 개의 개체군이 서로 경쟁적으로 진화하는 공진화 방법에 의해 최적의 신경망구조를 찾는 방법을 제안한다. 이 방법은 신경망구조를 나타내는 주개체군과 학습패턴을 나타내는 부개체군으로 되어 있으며, 이 두 개체군(신경망과 학습패턴)은 서로 경쟁적으로 진화한다. 즉, 학습패턴은 신경망이 학습하기 힘든 패턴으로 진화하고 신경망은 그 패넌들을 학습할 수 있도록 진화하단. 이 방법은 부적절한 학습패턴의 선택과 임의적인 신경망의 설계로 인한 시스템의 성능이 저하되는 것을 해결한다. 또한 공진화 방법에서 각 개체군의 적합도는 동적으로 변화하기 때문에 그 진행과정을 쉽게 알 수 없다. 따라서 본 논문에서는 그 진행과정을 관찰할 수 있는 방법도 소개한다. 마지막으로 제안한 방법을 로봇 매니플레이터의 비주얼 서보임 문제에 적용하여 그 유효성을 검증한다.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

• Journal of Welding and Joining
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• 제27권5호
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• pp.62-67
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• 2009

Welding deformation during the assembly process is affected by not only local shrinkage due to rapid heating and cooling, but also root gap and misalignment between parts to be welded. Therefore, the prediction and control of welding deformation have become of critical importance. In this study, it was focused on the development of the 3-axis apparatus for real-time measurement of the welded deformation. To achieve the objective, a D-H algorithm has been carried out to check the behavioral and performance evaluation for the developed robot. The sequence experiments were taken the base materials of $400{\times}200{\times}4.5mm$ plate for butt welding. The real-time experimental measurements are in good agreement with the measured results.

• Journal of Advanced Research in Ocean Engineering
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• 제3권3호
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• pp.136-148
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• 2017

The paper presents dual arm ROV manipulation using deep reinforcement learning. The purpose of this underwater manipulator is to investigate and excavate natural resources in ocean, finding lost aircraft blackboxes and for performing other extremely dangerous tasks without endangering humans. This research work emphasizes on a self-learning approach using Deep Reinforcement Learning (DRL). DRL technique allows ROV to learn the policy of performing manipulation task directly, from raw image data. Our proposed architecture maps the visual inputs (images) to control actions (output) and get reward after each action, which allows an agent to learn manipulation skill through trial and error method. We have trained our network in simulation. The raw images and rewards are directly provided by our simple Lua simulator. Our simulator achieve accuracy by considering underwater dynamic environmental conditions. Major goal of this research is to provide a smart self-learning way to achieve manipulation in highly dynamic underwater environment. The results showed that a dual robotic arm trained for a 3DOF movement successfully achieved target reaching task in a 2D space by considering real environmental factor.

• International Journal of Naval Architecture and Ocean Engineering
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• 제8권3호
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• pp.243-251
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• 2016

Autonomous Underwater Vehicles (AUVs) generally work in complex marine environments. Any fault in AUVs may cause significant losses. Thus, system reliability and automatic fault diagnosis are important. To address the actuator failure of AUVs, a fault diagnosis method based on the Gaussian particle filter is proposed in this study. Six free-space motion equation mathematical models are established in accordance with the actuator configuration of AUVs. The value of the control (moment) loss parameter is adopted on the basis of these models to represent underwater vehicle malfunction, and an actuator failure model is established. An improved Gaussian particle filtering algorithm is proposed and is used to estimate the AUV failure model and motion state. Bayes algorithm is employed to perform robot fault detection. The sliding window method is adopted for fault magnitude estimation. The feasibility and validity of the proposed method are verified through simulation experiments and experimental data.