• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.406-407
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• 2011

The dc link voltage in a single-phase PV system has necessarily twice component of fundamental wave. It makes high THD in the grid current, and according to the problem, power quality is lower. This paper proposes the new method for removing ripple voltage. The performance was verified through computer simulation using MATLAB.

• Journal of Power Electronics
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• 제19권4호
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• pp.881-893
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• 2019

This paper proposes a practical sliding-mode controller design for shaping the impedances of cascaded boost-converter power decoupling circuits for reducing the second order harmonic ripple in photovoltaic (PV) current. The cascaded double-boost converter, when used as power decoupling circuit, has some advantages in terms of a high step-up voltage-ratio, a small number of switches and a better efficiency when compared to conventional topologies. From these features, it can be seen that this topology is suitable for residential (PV) rooftop systems. However, a robust controller design capable of rejecting double frequency inverter ripple from passing to the (PV) source is a challenge. The design constraints are related to the principle of the impedance-shaping technique to maximize the output impedance of the input-side boost converter, to block the double frequency PV current ripple component, and to prevent it from passing to the source without degrading the system dynamic responses. The design has a small recovery time in the presence of transients with a low overshoot or undershoot. Moreover, the proposed controller ensures that the ripple component swings freely within a voltage-gap between the (PV) and the DC-link voltages by the small capacitance of the auxiliary DC-link for electrolytic-capacitor elimination. The second boost controls the main DC-link voltage tightly within a satisfactory ripple range. The inverter controller performs maximum power point tracking (MPPT) for the input voltage source using ripple correlation control (RCC). The robustness of the proposed control was verified by varying system parameters under different load conditions. Finally, the proposed controller was verified by simulation and experimental results.

• Journal of information and communication convergence engineering
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• 제5권4호
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• pp.358-361
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• 2007

We report on a new type dc-dc converter design that combines the advantage of dc ripple noise elimination and high efficiency. As potential low cost solar cells, DSC module and the panel's system efficiency and stability are still critical problems to the way of marketing. In this study, a new three-step dc-dc converter scheme with the phase-shift-carrier technology is proposed to apply for solar power system. We have achieved power conversion efficiency around 94.88%.

• 전력전자학회논문지
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• 제25권4호
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• pp.279-285
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• 2020

An open-end winding (OEW) permanent magnet synchronous motor with dual inverters can synthesize large voltages for a motor with the same DC link voltage. This ability has the advantage of reducing the use of DC/DC boost converters or high voltage batteries. However, zero-sequence voltage (ZSV), which is caused by the difference in the combined voltage between the primary and secondary inverters, can generate a zero-sequence current (ZSC) that increases system losses. Among the methods for eliminating this phenomenon, combining voltage vector eliminated ZSV cannot be accomplished by the conventional Pulse Width Modulation(PWM) method. In this study, a PWM carrier generation method using functionalization to generate a switching pattern to suppress ZSC is proposed and applied to analyze the control influence of the center-zero vector in the switching sequence about the current ripple.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.207-209
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• 2019

This paper proposes a grid-tied photovoltaic (PV) system, consisting of Voltage-fed dual-active-bridge (DAB) dc-dc converter with single phase inverter. The proposed converter allows a small dc-link capacitor, so that system reliability can be improved by replacing electrolytic capacitors with film capacitors. The double line frequency free maximum power point tracking (MPPT) is also realized in the proposed converter by using Ripple Correlation method. First of all, to eliminate the double line frequency ripple which influence the reduction of DC source capacitance, control is developed. Then, a designing of Current control in DQ frame is analyzed and to fulfill the international harmonics standards such as IEEE 519 and P1547, $3^{rd}$ harmonic in the grid is directly compensated by the feedforward terms generated by the PR controller with the grid current in stationary frame to achieve desire Total Harmonic Distortion (THD). 5-kW PV converter and inverter module with a small dc-link film capacitor was built in the laboratory with the proposed control and MPPT algorithm. Experimental results are given to validate the converter performance.

• Journal of Power Electronics
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• 제19권4호
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• 전력전자학회논문지
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• 제17권5호
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• pp.401-408
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• 2012

A simple on-line elimination strategy of the dead time and inverter nonlinearity using the current slope information is presented for a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive. In a PWM inverter-fed IPMSM drive, a dead time is inserted to prevent a breakdown of switching device. This distorts the inverter output voltage, resulting in a current distortion and torque ripple. In addition to the dead time, inverter nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The proposed scheme is based on the fact that the d-axis current ripple is mainly caused by the dead time and inverter nonlinearity. To eliminate such an influence, the current slope information is determined. The obtained current slope information is processed by the PI controller to estimate the disturbance caused by the dead time and inverter nonlinearity. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments. Without requiring any additional hardware, the proposed scheme can effectively eliminate the dead time and inverter nonlinearity even in the presence of the parameter uncertainty.

• 전기학회논문지
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• 제61권11호
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• pp.1625-1633
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• 2012

In the lighting industry, a Lighting Emitting Diode (LED) is increasingly used because of many advantages and a eco-friendly product comparing with the conventional lighting. However, the LED lighting has to include various AC/DC converters because the direct current is used for the LED lighting. Among a lot of power converters, the flyback converter is widely used for the LED lighting and includes some electrolytic capacitors for the voltage regulation. But the electrolytic capacitor has shorter lifetime than the LED element. It makes the expected life-time of the converter having the electrolytic capacitor shorter than the LED element. This paper proposes the single-stage PFC flyback converter without electrolytic capacitors. To verify the performance of the proposed converter, simulated and experimental works were carried out.

• Journal of Power Electronics
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• 제17권4호
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• pp.991-1003
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• 2017

The conventional sliding mode control (CSMC) has a number of problems. It may cause dc output voltage ripple and it cannot guarantee the robustness of the whole system for a matrix rectifier (MR). Furthermore, the existence of a filter can decrease the input power factor (IPF). Therefore, a novel global sliding mode control (GSMC) based on a hyperbolic tangent function with IPF compensation for MRs is proposed in this paper. Firstly, due to the reachability and existence of the sliding mode, the condition of the matrix rectifier's robustness and chattering elimination is derived. Secondly, a global switching function is designed and the determination of the transient operation status is given. Then a SMC compensation strategy based on a DQ transformation model is applied to compensate the decreasing IPF. Finally, simulations and experiments are carried out to verify the correctness and effectiveness of the control algorithm. The obtained results show that compared with CSMC, applying the proposed GSMC based on a hyperbolic tangent function for matrix rectifiers can achieve a ripple-free output voltage with a unity IPF. In addition, the rectifier has an excellent robust performance at all times.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.523-524
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• 2016

본 논문에서는 자기저항 (Magnetic Resistive, MR)각도 센서에서 자속 간섭 및 축 진동과 같은 외란에 의해 발생하는 각도맥동을 해결하는 방법이 연구되었다. 외란에 의한 각도 맥동은 일정한 기계각 속도 한 주기 내에서 전기각 속도가 불균일하게 측정되는 현상이다. 이를 해결하기 위해 위상동기루프 (phase locked loop, PLL)를 적용하였고, 자기저항 각도 센서의 각도 맥동을 효과적으로 제거하였다.