• 제목/요약/키워드: Resistance-capacitance

검색결과 459건 처리시간 0.031초

이온빔 에칭된 실리콘의 전기적 특성 및 표면 morphology (Electrical characteristic and surface morphology of IBE-etched Silicon)

  • 지희환;최정수;김도우;구경완;왕진석
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.279-282
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    • 2001
  • The IBE(ion beam etching)-induced Schottky barrier variation which depends on various etching history related with ion energy, incident angle and etching time has been investigated using voltage-current, capacitance-voltage characteristics of metal-etched silicon contact and morphology of etched surface were studied using AFM(atomic force microscope). For ion beam etched n-type silicons, Schottky barrier is reduced according to ion beam energy. It can be seen that amount of donor-like positive charge created in the damaged layer is proportional to the ion energy. By contrary, for ion beam etched p-type silicons, the Schottky barrier and specific contact resistance are both increased. Not only etching time but also incident angle of ion beam has an effect on barrier height. Taping-mode AFM analysis shows increased roughness RMS(Root-Mean-Square) and depth distribution due to ion bombardment. Annealing in an N$_2$ ambient for 30 min was found to be effective in improving the diode characteristics of the etched samples and minimum annealing temperatures to recover IBE-induced barrier variation were related to ion beam energy.

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$CF_4$ 플라즈마 처리된 ITO박막을 이용한 유기 EL 소자의 성능향상에 관한 임피던스 분석 (Impedance spectroscopy analysis of organic light emitting diodes with the $CF_4$ anode plasma treatment)

  • 박형준;김현민;이준신;손선영;정동근
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.320-321
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    • 2006
  • In this work, impedance Spectroscopic analysis was applied to study the effect of plasma treatment on the surface of indium-tin oxide (ITO) anodes using $CF_4g$ as and to model the equivalent circuit for organic light emitting diodes (OLEDs) with the $CF_4$ plasma treatment of ITO surface at the anodes. This device with ITO/TPD/$Alq_3$/LiF/Al structure can be modeled as a simple combination of a resistor and a capacitor. The $CF_4$ plasma treatment on the surface of ITO shifts the vacuum level of the ITO as a result of which the barrier height for hole injection at the ITO/organic interface is reduced. The Impedance spectroscopy measurement of the devices with the $CF_4$ plasma treatment on the surface of ITO anodes shows change of values in parallel resistance ($R_p$) and parallel capacitance ($C_p$).

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활성탄소 전극의 제조방식에 따른 EDLC 특성비교 (Comparison of Electrochemical Properties of EDLCs using Activated Carbon Electrodes Fabricated with Various Binders)

  • 양선혜;전민제;김익준;문성인;김현수
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.353-354
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    • 2006
  • This work describes the effect of binders, such as carboxymethylcellulose (CMC), CMC+Polytetrafluoroethylene (PTFE) and PTFE, on the electrochemical and mechanical properties of activated carbon-electrode for electric double layer capacitor. The cell capacitors using the electrode bound with binary binder composed of CMC and PTFE, especially m composition CMC ; PTFE = 60 : 40 wt %, has exhibited the better rate capability and the lower internal resistance than those of the cell capacitor with CMC. On the other hand, the sheet type electrode kneaded with PTFE was bonded with conductive adhesive on Al foil. This cell capacitor using the electrode with PTFE exhibited the best mechanical properties and rate capability compared to the CMC and CMC+PTFE one These behaviors could be explained by the well-developed network structure of PTFE fibrils during the kneading process.

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GaN FET를 적용한 인터리브 CRM PFC의 효율특성에 관한 연구 (A Study on the Efficiency Characteristics of the Interleaved CRM PFC using GaN FET)

  • 안태영;장진행;길용만
    • 전력전자학회논문지
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    • 제20권1호
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    • pp.65-71
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    • 2015
  • This paper presents the efficiency analysis of a critical current mode interleaved PFC rectifier, in which each of three different semiconductor switches is employed as the active switch. The Si FET, SiC FET, and GaN FET are consecutively used with the prototype PFC rectifier, and the efficiency of the PFC rectifier with each different semiconductor switch is analyzed. An equivalent circuit model of the PFC rectifier, which incorporates all the internal losses of the PFC rectifier, is developed. The rms values of the current waveforms main circuit components are calculated. By adapting the rms current waveforms to the equivalent model, all the losses are broken down and individually analyzed to assess the conduction loss, switching loss, and magnetic loss in the PFC rectifier. This study revealed that the GaN FET offers the highest overall efficiency with the least loss among the three switching devices. The GaN FET yields 96% efficiency at 90 V input and 97.6% efficiency at 240 V, under full load condition. This paper also confirmed that the efficiency of the three switching devices largely depends on the turn-on resistance and parasitic capacitance of the respective switching devices.

Development of Electrical Models of TFT-LCD Panels for Circuit Simulation

  • Park, Hyun-Woo;Kim, Soo-Hwan;Kim, Sung-Ha;Kim, Su-Ki;McCartney, Richard I.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.733-738
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    • 2006
  • As the film transistor-liquid crystal display (TFTLCD) panels become larger and provide higher resolution, the propagation delay of row and column lines, the voltage modulation of Vcom, and the response time of liquid crystal affect the display images now more than in the past. It is more important to understand the electrical characteristic of TFT-LCD panels these days. This paper describes the electrical model of a 15-inch XGA ($1024{\times}768$) TFT-LCD panel. The parasitic resistance and capacitance of its panel are obtained by 3D simulation of a sub pixel. The accuracy of these data is verified by the measured values in an actual panel [1]. The developed panel simulation platform, the equivalent circuit of a 15-inch XGA panel, is simulated by HSPICE. The results of simulation are compared with those of experiment, according to changing the width of signal. Especially, the proposed simulation platform for modeling TFTLCD panels can be applied to large size LCD TVs. It can help panel and circuit designers to verify their ideas without making actual panels and circuits.

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EDLC용 활성탄소 전극의 전기화학적 기계적 특성에 미치는 바인더의 영향 (Effect of Binders on Electrochemical and Mechanical Properties of Activated Carbon Electrode for Electric Double Layer Capacitor)

  • 전민제;김익준;양선혜;문성인;김현수;오대희
    • 한국전기전자재료학회논문지
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    • 제19권12호
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    • pp.1167-1171
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    • 2006
  • This work describes the effect of binders, such as carboxymethylcellulose (CMC), CMC+ Polytetrafluoroethylene (PTFE) and PTFE, on the electrochemical and mechanical properties of activated carbon-electrode for electric double layer capacitor. The cell capacitors using the electrode bound with binary binder composed of CMC and PTFE, especially in composition CMC PTFE = 60 : 40 wt.%, has better rate capability and the lower internal resistance than those of the cell capacitor with CMC. On the other hand, the sheet type electrode kneaded with PTFE was bonded with conductive adhesive on Al foil. This cell capacitor using the electrode with PTFE exhibited the best mechanical properties and rate capability compared to the CMC and CMC+PTFE one. These behaviors could be explained by the well-developed network structure of PTFE fibrils doting the kneading process.

300kJ${\times}$B 모듈로 구성된 커패시터 뱅크의 특성 분석 (Characteristics of Capacitor Bank Composed of Eight Paralleled Modules)

  • 성기열;정재원;최영호;김진성;추증호;이홍식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2001년도 하계학술대회 논문집 C
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    • pp.1600-1602
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    • 2001
  • A pulsed power supply of 2.4MJ capacitor bank has been developed to make investigation into electric gun technology. It is made up of eight paralleled 300kJ modules, and can supply various shape of high current pulse by changing charging voltage, inductance, capacitance, and firing time of each module. The 300kJ module has been designed and fabricated for the maximum operating voltage of 22kV, peak current of 150kA, and pulse duration of 1msec. The experiments of the modules were done, and the equivalent circuit of the module was determined. The characteristics of the module were analyzed more deeply through the circuit simulation. The experiments of the paralleled modules with inductance of 20 $\mu$H and load resistance of 100 m$\Omega$ were performed, where the modules were discharged simultaneously and/or sequentially. The results of the experiments were analyzed. The 2.4MJ capacitor bank is currently used as the pulsed power supply for the ETCG (Electro Thermal Chemical Gun) research.

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PE-CVD를 이용한 45nm이하급 저유전물질 DEMS(Diethoxymethylsiliane) 박막증착연구 (Thin Films Deposition Study Using Plasma Enhanced CVD with Low Dielectric Materials DEMS(diethoxymethlysiliane) below 45nm)

  • 강민구;김대희;김영철;서화일
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.148-148
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    • 2008
  • Low-k dielectric materials are an alternative plan to improve the signal propagation delay, crosstalk, dynamic power consumption due to resistance and parasitic capacitance generated the decrease of device size. Now, various materials is studied for the next generation. Diethoxymethlysiliane (DEMS) precursor using this study has two ethoxy groups along with one methyl group attached to the silicon atoms. SiCOH thin films were deposited on p-type Si(100) substrate by Plasma Enhanced Chemical Vapor Deposition (PECVD) using DEMS. In this study, we studied the effect of oxygen($O_2$) flow rate for DEMS to characteristics of thin films. The characteristics of thin films deposited using DEMS and $O_2$ evaluated through refractive index, dielectric constant(k), surface roughness, I-V(MIM:Al / SiCOH / Ag), C-V(MIM), deposition rate.

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Wide Bandgap 소자의 안정적 구동을 위한 하드웨어 최적 설계 및 구현 (Design and Implementation of an Optimal Hardware for a Stable Operating of Wide Bandgap Devices)

  • 김동식;주동명;이병국;김종수
    • 전기학회논문지
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    • 제65권1호
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    • pp.88-96
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    • 2016
  • In this paper, the GaN FET based phase-shift full-bridge dc-dc converter design is implemented. Switch characteristics of GaN FET were analyzed in detail by comparing state-of-the-art Si MOSFET. Owing to the low conduction resistance and parasitic capacitance, it is expected to GaN FET based power conversion system has improved performance. However, GaN FET is vulnerable to electric interference due to the relatively low threshold voltage and fast switching transient. Therefore, it is necessary to consider PCB layout to design GaN FET based power system because PCB layout is the main reason of stray inductance. To reduce the electric noise, gate voltage of GaN FET is analyzed according to operation mode of phase-shift full-bridge dc-dc converter. Two 600W phase-shifted full-bridge dc-dc converter are designed based on the result to evaluate effects of stray inductance.

RF MOSFET의 단위 Finger 폭에 대한 $f_T$$f_{max}$ 종속성 분석 (Analysis of $f_T$ and $f_{max}$ Dependence on Unit Finger Width for RF MOSFETs)

  • 차지용;차준영;정대현;이성현
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2008년도 하계종합학술대회
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    • pp.389-390
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    • 2008
  • The dependence of $f_T$ and $f_{max}$ on the unit finger width is measured and analyzed for $0.13{\mu}m$ MOSFETs. The increase of $f_T$ at narrow width is attributed by the parasitic gate-bulk capacitance, and the decrease of $f_T$ at wide width is generated by the reduction of increasing rate of $g_{mo}$. The increase of $f_{max}$ at narrow width is originated from the abrupt reduction of gate resistance due to the non-quasi-static effect. These analysis results will be valuable information for layout optimization to improve $f_T$ and $f_{max}$.

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