• Journal of Information Display
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• 제7권4호
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• pp.24-26
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• 2006

We have developed a new driving method named TROPHY(Talented Role-playing Technology with Dual Polarity sustainer in Hybrid Mono board). In this method, the sustain voltage is partially compared to the conventional method and the number of power sources is reduced by voltage level unification during the reset, address and sustain period. The hybrid mono board was especially developed to implement those technologies. Through this, we can lower the cost with the TROPHY compared to the conventional one. It is a suitable technology to improve the reliability of circuit and image sticking problem. We can also reduce the number of driving boards and the EMI problem compared with those of the conventional method.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.246-249
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• 2006

We have developed a new driving method named TROPHY(Talented Role-playing Technology with Dual Polarity sustainer in Hybrid Mono board). In this method, the sustain voltage is halved compared to the conventional method and the number of power sources is reduced by voltage level unification during the reset, address and sustain period. The hybrid mono board was especially developed to implement those technologies. Therefore, we can lower the cost with the TROPHY compared to the conventional one. It is suitable technology to improve the reliability of circuit and image sticking problem. We can also reduce the number of driving boards and the EMI problem comparing to those of the conventional method.

• 한국컴퓨터정보학회논문지
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• 제25권3호
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• pp.89-96
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• 2020

본 논문은 시스템 내부에서 소프트웨어 오류가 발생하였을 경우 컨트롤러 내의 Watchdog Timer를 이용하여 시스템의 상태를 오류 발생시점 이전 상태로 복구하는 시스템을 설계 구현하고, 하드웨어 오류 발생 시 별도의 리셋 회로를 통해 시스템을 재실행할 수 있는 기술을 제안한다. 제안 시스템은 외부 지원 없이 시스템 자체적으로 반영구적으로 작동 할 수 있도록 함으로써, 시스템의 안정적인 작동, 유지비용 절감 및 신뢰성을 제공하며, 고 신뢰성 응용분야에서 요구되는 자가 동작, 진단 및 복구 기능을 통한 시스템의 항상성 유지를 위한 적용이 가능하다.

• Journal of Power Electronics
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• 제8권2호
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• pp.148-155
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• 2008

In this paper, a cost-effective PDP driving circuit using the transformer network is proposed. Compared with the previous works, the half-bridge type energy recovery circuit recovers the reactive energy not to the capacitor but to the source. A single sustain board architecture removes the blocking switches which are placed on the discharge path in parallel, thus reducing the number of devices. A simple reset circuit generates the same waveforms as the previous approaches. The circuit configuration and modified driving waveforms are compared with the previous works. The validity of the proposed simplified driver is verified through tests using a 6-inch panel.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2007년도 추계학술대회 논문집
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• pp.215-217
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• 2007

Recently, the demand for high definition TV is being increased by beginning of the digital broadcasting. The higher resolution of PDP is, the longer addressing time become, then, the sustain period for display image decreases. Because of the reason, dual-scan method which synchronously write information of an image on top and bottom of the screen is used for the high definition PDP. However, as the price competition of PDP becomes severe, we can`t avoid turning to a single-scan method which uses only a half of an expensive address IC. Accordingly, the sustain period becomes much shorter than prior method. In case of XGA level, it is impossible to display, eventually. In this paper, we are going to prove usefulness by realizing negative reset waveform and the driving circuit for high speed addressing.

• 센서학회지
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• 제18권6호
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• pp.475-484
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• 2009

In this paper, an analysis of the complementary CMOS active pixel and readout circuit is carried out. Complementary pixel structure which is different from conventional 3TR APS structure consists of photo diode, reset PMOS, several NMOSs and PMOSs sets for complementary signals. Proposed CMOS image sensors pixel has been fabricated using 0.5 standard CMOS process. Measured results show that the output signal range is from 0.8 V to 3.8 V. This output signal range increased 125 % compared to conventional 3TR pixel in the condition of 5 V power supply.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.2021-2023
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• 1998

In this paper we further propose to add a very simple regenerative clamping circuit to SSIPP to reduce the voltage stress and to recycle the energy trapped in the leakage inductance of the isolation transformer, thus eliminating the need for a lossy snubber circuit. In addition, this proposed clamping circuit also provides a mechanism to reset the magnetizing current of the output transformer of SSIPP employing a Forward converter as the output stage. Simulations and experimental results are reported to verify the operation and performance of the SSIPP with regenerative clamping.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.11-12
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• 2009

In this paper, we propose a high voltage driver IC(HVIC) for LCD and PDP TV power supply. The proposed circuit is included novel a shoot-through protection and a pulse generation circuit for the high voltage driver IC. The proposed circuit has lower variation of dead time and pulse-width about a variation of a process and a supply voltage than a conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also the proposed pulse generation circuit prevent from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, and its variation is maximum 170 ns(68 %) about a variation of a process and a supply voltage. The proposed circuit is designed using $1\;{\mu}m$ 650 V BCD process parameter, and a simulation is carried out using Spectre.

• 한국전기전자재료학회논문지
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• 제22권10호
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• pp.801-807
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• 2009

In this paper, we propose a novel shoot-through protection circuit and pulse generator for half-bridge driver IC. We designed a robust half-bridge driver IC over a variation of processes and power supplies. The proposed circuit is composed a delay circuit using a beta-multiplier reference. The proposed circuit has a lower variation rate of dead time and pulse-width over variation of processes and supply voltages than the conventional circuit. Especially, the proposed circuit has more excellent pulse-width matching of set and reset signals than the conventional circuit. Also, the proposed pulse generator is prevented from fault operations using a logic gate. Dead time and pulse-width of the proposed circuit are typical 250 ns, respectively. The variation ratio is 68%(170 ns) of maximum over variation of processes and supply voltages. The proposed circuit is designed using $1\;{\mu}m$ 650 V BCD (Bipolar, CMOS, DMOS) process parameter, and the simulations are carried out using Spectre simulator of Cadence corporation.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1271-1274
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• 2006

Integrated a-Si:H gate driver with high reliability has been designed and simulated. The proposed a-S:H gate driver has only one reset transistor under AC driving for P and output node. These reset transistors show much less degradation than those under DC driving. The simulation results show that the lifetime and response time are improved significantly compared with those of the prior circuit.