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http://dx.doi.org/10.5369/JSST.2009.18.6.475

Hardware implementation of a CMOS image sensor pixel using complemental signal path  

Jung, Jin-Woo (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University)
Kwon, Bo-Min (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University)
Kim, Ji-Man (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University)
Park, Ju-Hong (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University)
Park, Yong-Su (Department of Electronics, Chung cheong University)
Lee, Je-Won (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University)
Song, Han-Jung (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University)
Publication Information
Journal of Sensor Science and Technology / v.18, no.6, 2009 , pp. 475-484 More about this Journal
Abstract
In this paper, an analysis of the complementary CMOS active pixel and readout circuit is carried out. Complementary pixel structure which is different from conventional 3TR APS structure consists of photo diode, reset PMOS, several NMOSs and PMOSs sets for complementary signals. Proposed CMOS image sensors pixel has been fabricated using 0.5 standard CMOS process. Measured results show that the output signal range is from 0.8 V to 3.8 V. This output signal range increased 125 % compared to conventional 3TR pixel in the condition of 5 V power supply.
Keywords
CMOS; complementary pixel; photo diode; readout circuit; PMOS reset;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
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