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Hardware implementation of a CMOS image sensor pixel using complemental signal path

상보형 신호경로 방식의 CMOS 이미지 센서 픽셀의 하드웨어 구현

  • Jung, Jin-Woo (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University) ;
  • Kwon, Bo-Min (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University) ;
  • Kim, Ji-Man (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University) ;
  • Park, Ju-Hong (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University) ;
  • Park, Yong-Su (Department of Electronics, Chung cheong University) ;
  • Lee, Je-Won (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University) ;
  • Song, Han-Jung (Nano Systems Engineering, Center for Nano Manufacturing, Inje University School of Nano Engineering, Inje University)
  • 정진우 (인제대학교 대학원 나노시스템공학과) ;
  • 권보민 (인제대학교 대학원 나노시스템공학과) ;
  • 김지만 (인제대학교 나노공학부) ;
  • 박주홍 (인제대학교 대학원 나노시스템공학과) ;
  • 박용수 (충청대학교 전기전자학부) ;
  • 이제원 (인제대학교 나노공학부) ;
  • 송한정 (인제대학교 나노공학부)
  • Published : 2009.11.30

Abstract

In this paper, an analysis of the complementary CMOS active pixel and readout circuit is carried out. Complementary pixel structure which is different from conventional 3TR APS structure consists of photo diode, reset PMOS, several NMOSs and PMOSs sets for complementary signals. Proposed CMOS image sensors pixel has been fabricated using 0.5 standard CMOS process. Measured results show that the output signal range is from 0.8 V to 3.8 V. This output signal range increased 125 % compared to conventional 3TR pixel in the condition of 5 V power supply.

Keywords

References

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