• Journal of the Korean Institute of Landscape Architecture
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• v.45 no.6
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• pp.160-170
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• 2017

As a monumental building in the form of an arch, an archway has the characteristics of praise and honor. More and more historic, cultural and social connotations are given during the development of history. Four archways that are located on the middle route of the Red Gate Palace in the Mount Tai Scenic Area were chosen for research. Based on a literature review and field investigation with a visual analysis method, the physical attributes, spatial scale, perceptions and functions of the archways were discussed. The results were as follows: The archways in the research area are all made of stone. According to building location, they are classified into two types: Cultural archway and temple archway. Regarding functions, they are divided into symbolic archway, memorial archway and portal archway. From the point of view of form and scale, the Confucius Boarding Archway enjoys a higher standard than the other three. This reflects the importance of Confucian culture on Mount Tai. Regarding spatial scale, the archway becomes the focus in a restrictive linear space by an object-to-object and person-to-object comparison. Visitor experience of crossing the archways is strongly enhanced as it acts as entrance and exit, and it has the function of guiding sight since the arrangement of the archways further extend the line of sight. Couplets and inscriptions on the archways increase a sense of expectation for visitors on their way to the top of Mount Tai.

• Korean Journal of Heritage: History & Science
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• v.44 no.3
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• pp.44-61
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• 2011

This study consider the life and works of Hu ShunShen(胡舜申) who was the author of JiRiSinBub(地理新法) which the representative FengShui book in Choson dynasty. His adult name is RuJia(汝嘉). He was born in on September 6, 1091 at JiXi(績溪) in China as a son of Ho Xian(胡咸). He left his hometown with his family to avoid war and settled down in HuZhou(胡州). He took up an official post with his brother's YinPu(蔭補), and held several provincial official posts. After serving as vice governor(通判) of ShuZhou(舒州), he became supervisor of taoist temple(崇道觀) in TaiZhou(台州) and retired from office. After burying his father, he took an interest in fengShui(風水) and studied for a long time. People say that JiangXiDilixinfa(江西地理新法) is the well-known FengShui book written by him. When he was 74 years old, he suggested opening SheMen(蛇門) gate and XuMen(胥門) gate in SuZhou(蘇州) castle by "WoMenZhongGao(吳門忠告)". But it didn't come ture. He died March 9, 1177 at the age of 87 and was buried in HuZhou(胡州). His elder brother Hu Shunzhi(胡舜陟) and nephew HuZi(胡仔) is well-known. He had a son named Hu wei(胡偉) who served pacification commissioners of JiangXi(江西宣撫使). His Works were YiSiSiZhouLu(乙巳泗州錄), YiYouBiLuanLu(己酉避亂錄) as essay and YinYangBeiYong(陰陽備用), JiRiSinBub(地理新法), "WoMenZhongGao(吳門忠告)" as fengShui text.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.464-466
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• 2019

Controllers used in nuclear power plants require high reliability. A controller including a Field Programmable Gate Array (FPGA) and a Complex Programmable Logic Device (referred to hereinafter as FPGA) has been applied to many Nuclear Power Plants (NPP) in the past, including the APR1400 (Advanced Power Reactor 1400), a Korean digital nuclear power plant. Initially, the FPGA was considered as a general IC (Integrated Circuit) and verified only by device verification and performance testing. In the 1990s, research on FPGA verification began, and until the FPGA became a chip, it was regarded as software and the software Verification and Validation (V&V) using IEEE 1012-2004 was implemented. Currently, IEC 62566, which is a European standard, has been applied for a lot of verification. This method has been evaluated as the most sensible method to date. This is because the method of verifying the characteristics of SoC (System on Chip), which has been a problem in the existing verification method, is sufficiently applied. However, IEC 62566 is a European standard that has not yet been adopted in the United States and maintains the application of IEEE 1012 for FPGA. IEEE 1012-2004 or IEC 62566 is a technical standard. In practice, various methods are applied to meet technical standards. In this paper, we describe the procedure and important points of verification method of Nuclear Safety Class FPGA applying SoC verification method.

• Journal of the Korean Society of Radiology
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• v.16 no.4
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• pp.453-462
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• 2022

In this paper, the artificial intelligence (AI) technology used in the medical image analysis field was analyzed through a literature review. Literature searches were conducted on PubMed, ResearchGate, Google and Cochrane Review using the key word. Through literature search, 114 abstracts were searched, and 98 abstracts were reviewed, excluding 16 duplicates. In the reviewed literature, AI is applied in classification, localization, disease detection, disease segmentation, and fit degree of registration images. In machine learning (ML), prior feature extraction and inputting the extracted feature values into the neural network have disappeared. Instead, it appears that the neural network is changing to a deep learning (DL) method with multiple hidden layers. The reason is thought to be that feature extraction is processed in the DL process due to the increase in the amount of memory of the computer, the improvement of the calculation speed, and the construction of big data. In order to apply the analysis of medical images using AI to medical care, the role of physicians is important. Physicians must be able to interpret and analyze the predictions of AI algorithms. Additional medical education and professional development for existing physicians is needed to understand AI. Also, it seems that a revised curriculum for learners in medical school is needed.

• Journal of the Korean Vacuum Society
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• v.18 no.2
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• pp.79-84
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• 2009

The electron emission source of triode type has been fabricated using CNT paste. The nano Ag particle and photosensitive polymers were added to the CNT paste. The surface roughness of the CNT emitter was uniform by the back exposure method. The added nano Ag particle improves the adhesion and the electric conductance with small variation in the CNTs and between electrode. After the aging with heat-exhausting, the reliability of the triode CNT electron source was secured in the high voltage and current operation for 12 hours. At this time, the gate leakage current was about 10 % less than.

• Journal of Korean Society of Coastal and Ocean Engineers
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• v.32 no.4
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• pp.211-222
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• 2020

This study suggested a method calculating the influence of effluent discharge from Saemangeum sluice-gates using the particle tracking model. For 2017, we presented the seasonal effects of effluent discharge as probability spatial distributions and compared with the results of the water age, one of the indicators of transport time scale. The influence of sluice-gates effluent discharge increases radially around Sinshi or Gaseok gates, which are expected to be biased toward the south in winter and north in summer due to the effect of seasonal winds. Although the results of the prediction are limited to the 2017 situation, the method of calculating the influence of sluice-gates effluent discharge using the Lagrangian particle tracking model can be used to predict the future of the around Saemangeum.

• Korean Journal of Optics and Photonics
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• v.17 no.6
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• pp.564-568
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• 2006

Using the cross-gain modulation (XGM) characteristics of semiconductor optical amplifiers (SOAs), multi-functional all-optical logic gates, including XOR, AND, and OR gates are successfully simulated and demonstrated at 10Gbit/s. A VPI component maker^TM simulation tool is used for the simulation of multi-functional all-optical logic gates and the10 Cbit/s input signal is made by a mode-locked fiber ring laser. A multi-quantum well (MQW) SOA is used for the simulation and demonstration of the all-optical logic system. Our suggested system is composed of three MQW SOAs, SOA-1 and SOA-2 for XOR logic operation and SOA-2 and SOA-3 for AND logic operation. By the addition of two output signals XOR and AND, all-optical OR logic can be obtained.

• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.230-232
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• 2019

Light Triggerd Thyristor (LTT)는 HVDC 및 산업용 스위치 등에 사용되는 대전력 반도체소자이다. 일반적인 Thyristor가 전기적 신호에 의해 trigger 되는 것과는 다르게 LTT는 광신호에 의해 동작하는 소자이다. 본 논문에서는 5,000V, 2,200A 급의 4인치 LTT 소자의 제작 및 전기적인 특성평가 결과를 기술하였다. 4인치 LTT의 구조적인 특징은 전면부 중앙에 광신호가 주입되는 수광부가 위치해 있으며 입력 전류 증폭을 위한 4-단계 증폭 게이트 (gate) 구조를 가지도록 설계하였다. $400{\Omega}{\cdot}cm$ 비저항을 갖는 1mm 두께의 n-형 실리콘 웨이퍼에 boron 이온주입과 열처리 공정으로 약 $30{\mu}m$ 깊이의 p-base를 형성하였으며, 고내압 저지를 위한 edge termination은 VLD (variable lateral doping) 기술을 적용하였다. 제작된 4인치 LTT는 6,500 V의 순방향 항복전압 ($V_{DRM}$) 특성을 나타내었으며, 100V의 어노드전압 ($V_A$)과 20 mA의 게이트전류 ($I_G$)에 의하여 thyristor가 trigger 됨을 확인하였다. 제작한 LTT 소자는 disk형 press-pack 패키지를 진행한 후, LTT의 수광부에 $10{\mu}s$, 50 mW의 900 nm 광 펄스를 조사하여 전류 특성을 평가하였다. LTT 패키지 샘플에 60 Hz 주파수의 광 펄스를 조사한 경우 2,460 A의 순방향 평균전류 ($I_T$)와 $336A/{\mu}s$의 반복전류상승기울기 (repetitive di/dt)에 안정적으로 동작함을 확인하였다. 또한, 펄스 전류 시험의 경우 61.6 kA의 최대 통전 전류 (ITSM, surge current)와 $1,050A/{\mu}s$의 펄스전류 상승 기울기 (di/dt of on-state pulse current)에도 LTT의 손상 없이 동작함을 확인하였다.

• Journal of Information Display
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• v.2 no.3
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• pp.48-53
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• 2001

Carbon nanotube emitters, prepared by screen printing, have demonstrated a great potential towards low-cost, largearea field emission displays. Carbon nanotube paste, essential to the screen printing technology, was formulated to exhibit low threshold electric fields as well as an emission uniformity over a large area. Two different types of triode structures, normal gate and undergate, have been investigated, leading us to the optimal structure designing. These carbon nanotube FEDs demonstrated color separation and high brightness over 300 $cd/m^2$ at a video-speed operation of moving images. Our recent developments are discussed in details.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.599-602
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• 2005

In this paper, we have performed a study that modifies the CPW Pad configurations to improve an $f_{max}$ characteristic of metamorphic HEMT. To analyze the CPW Pad structures of MHEMT, we use the ADS momentum simulator developed by $Agilent^{TM}$. Comparing the employed structure (G/W = 40/100 m), the optimized structure (G/W = 20/25 m) of CPW MHEMT shows the increased $S_{21}$ by 2.5 dB, which is one of the dominant parameters influencing the $f_{max}$ of MHEMT. To compare the performances of optimized MHEMT with the employed MHEMT, DC and RF characteristics of the fabricated MHEMT were measured. In the case of optimized CPW MHEMT, the measured saturated drain current density and transconductance $(g_m)$ were 693 mA/mm and 647 mS/mm, respectively. RF measurements were performed in a frequency range of $0.1{\sim}110$ GHz. A high $S_{21}$ gain of 5.5 dB is shown at a millimeter-wave frequency of 110 GHz. Two kinds of RF gains, $h_{21}$ and maximum available gain (MAG), versus the frequency, and a cut-off frequency ($f_t$) of ${\sim}154$ GHz and a maximum frequency of oscillation ($f_{max}$) of ${\sim}358$ GHz are obtained, respectively, from the extrapolation of the RF gains for a device biased at a peak transconductance. An optimized CPW MHEMT structure is one of the first reports among fabricated 0.1 m gate length MHEMTs.