• Journal of the Microelectronics and Packaging Society
• /
• v.19 no.4
• /
• pp.1-5
• /
• 2012

The quality and performance of electronic parts and equipment are affected by various types of stresses. Thermal stress caused by changes in the ambient usage environment and mechanical stress from vibration shock during transportation can degrade both quality and performance. This paper gives an overview about recent researches for measuring market environmental conditions of electronic equipments.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2002.05a
• /
• pp.138-141
• /
• 2002

There are continuous efforts in the electronics industry to a reduced electronic package size. Reducing the size of electronic packages can be achieved by a variety of means, and for ball grid array(BGA) packages an effective method is to decrease the pitch between the individual balls. Chip scale package(CSP) and BGA are now one of the major package types. However, a reduced package size has the negative effect of reducing board-level reliability. The reliability concern is for the different thermal expansion rates of the two-substrate materials and how that coefficient CTE mismatch creates added stress to the BGA solder joint when thermal cycled. The point of thermal fatigue in a solder joint is an important factor of BGA packages and knowing at how many thermal cycles can be ran before failure in the solder BGA joint is a must for designing a reliable BGA package. Reliability of the package was one of main issues and underfill was required to improve board-level reliability. By filling between die and substrate, the underfill could enhance the reliability of the device. The effect of underfill on various thermomechanical reliability issues in $\mu$BGA packages is studied in this paper.

• Journal of the Microelectronics and Packaging Society
• /
• v.22 no.3
• /
• pp.9-17
• /
• 2015

After its inception in 1994, the Journal of the Microelectronics and Packaging Society has continued to make significant strides in the number and quality of publications within its field. The interest in the microelectronics and packaging research has become more critical as consumer electronic products continue its increasing trend towards thinner and lighter devices that tests the boundaries of electronic devices. This study utilizes social network analysis of all published literature in the Journal for the past 22 years. Using the keywords and abstracts available within each individual article, the publications within the Journal has focused on major topics covering (1) flip chip, (2) reliability, (3) Cu, (4) IMC (intermetallic compounds), and (5) thin film. Using the social network relationship between keywords within articles, flip chip was closely associated with reliability, BGA (ball grid array), contact resistance, electromigration in many of the published research works within the Journal. From the centrality analysis, it was found that flip chip, reliability, Cu, thin film, IMC, and RF (radio frequency) to have a high degree of centrality suggesting these key areas of research have relatively high connectivity with other research topics within the Journal and is central to many of the research fields within the micro-electronics and packaging area. The cohesiveness analysis showed research clustering of five major cohesive sub-groups and was mapped to better understand the major area of research within this field. Research within the field of micro-electronics and packaging converges many disciplines of science and engineering. The continued evolution within this field requires an understanding of the rapidly changing industry environment and the consumer needs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.33 no.5
• /
• pp.367-372
• /
• 2020

As packaging processes for atomic gyroscope vapor cells, the glass tube tip-off process, anodic bonding, and paste sealing have been widely studied. However, there are stability issues in the alkali metal which are caused by impurity elements and leakage during high-temperature processes. In this study, we investigated the applicability of a vapor cell low-temperature packaging process by depositing Au on a Pyrex cell in addition to forming an Au-Sn thin film on a cap to cover the cell, followed by laser irradiation of the Au/Au-Sn interface. The mechanism of the thin film bonding was evaluated by XRD, while the packaging reliability of an Ne gas-filled vapor cell was characterized by variation of plasma discharge behavior with time. Furthermore, we confirmed that the Rb alkaline metal inside the vapor cell showed no color change, indicating no oxidation occurred during the process.

• Journal of the Microelectronics and Packaging Society
• /
• v.20 no.4
• /
• pp.53-58
• /
• 2013

An innovative packaging solution, Flip Chip with Copper (Cu) Column bond on lead (BOL) Enhanced Process (fcCuBE$^{(R)}$) delivers a cost effective, high performance packaging solution over typical bond on capture pad (BOC) technology. These advantages include improved routing efficiency on the substrate top layer thus allowing conversion functionality; furthermore, package cost is lowered by means of reduced substrate layer count and removal of solder on pad (SOP). On the other hand, as electronic packaging technology develops to meet the miniaturization trend from consumer demand, reliability testing will become an important issue in advanced technology area. In particular, electromigration (EM) of flip chip bumps is an increasing reliability concern in the manufacturing of integrated circuit (IC) components and electronic systems. This paper presents the results on EM characteristics on BOL and BOC structures under electrical current stressing in order to investigate the comparison between two different typed structures. EM data was collected for over 7000 hours under accelerated conditions (temperatures: $125^{\circ}C$, $135^{\circ}C$, and $150^{\circ}C$ and stress current: 300 mA, 400 mA, and 500 mA). All samples have been tested without any failures, however, we attempted to find morphologies induced by EM effects through cross-sectional analysis and investigated the interfacial reaction characteristics between BOL and BOC structures under current stressing. EM damage was observed at the solder joint of BOC structure but the BOL structure did not show any damage from the effects of EM. The EM data indicates that the fcCuBE$^{(R)}$ BOL Cu column bump provides a significantly better EM reliability.

• Journal of the Microelectronics and Packaging Society
• /
• v.21 no.2
• /
• pp.23-29
• /
• 2014

Less power consumption, lower cost, smaller size and more functionality are the increasing demands for consumer electronic devices. The three dimensional(3-D) TSV packaging technology is the potential solution to meet this requirement because it can supply short vertical interconnects and high input/output(I/O) counts. Cu(Copper) has usually been chosen to fill the TSV because of its high conductivity, low cost and good compatibility with the multilayer interconnects process. However, the CTE mismatch and Cu ion drift under thermal stress can raise reliability issues. This study discribe the thermal stress reliability trend for successful implementation of 3-D packaging.

• Journal of the Microelectronics and Packaging Society
• /
• v.16 no.2
• /
• pp.1-9
• /
• 2009

Conductive adhesives have recently received a lot of focus and attention from the researchers in electronics industry as a potential substitute to lead-containing solders. Numerous studies have shown that the conductive adhesives have many advantages over conventional soldering such as environmental friendliness, finer pitch feasibility and lower temperature processing. This review focuses on the recent research trends on the reliability and property evaluation of anisotropic and non-conductive films that interconnect the integrated circuit component to the printed circuit board or other types of substrate. Major topics covered are the conduction mechanism in adhesive interconnects; mechanical reliability; thermo-mechanical-hygroscopic reliability and electrical performance of the adhesive joints. This review article is aimed at providing a better understanding of adhesive interconnects, their principles, performance and feasible applications.

• Journal of the Microelectronics and Packaging Society
• /
• v.24 no.1
• /
• pp.35-43
• /
• 2017

The three-dimensional integrated circuit (3D-IC) is a general trend for the miniaturized and high-performance electronic devices. The through-silicon-via (TSV) is the advanced interconnection method to achieve 3D integration, which uses vertical metal via through silicon substrate. However, the TSV based 3D-IC undergoes severe thermo-mechanical stress due to the CTE (coefficient of thermal expansion) mismatch between via and silicon. The thermo-mechanical stress induces mechanical failure on silicon and silicon-via interface, which reduces the device reliability. In this paper, the thermo-mechanical reliability of TSV based 3D-IC is reviewed in terms of mechanical fracture, heat conduction, and material characteristic. Furthermore, the state of the art via-level and package-level design techniques are introduced to improve the reliability of TSV based 3D-IC.

• Journal of the Microelectronics and Packaging Society
• /
• v.24 no.4
• /
• pp.9-17
• /
• 2017

In these days, MEMS (micro-electro-mechanical system) devices become the crucial sensor components in mobile devices, automobiles and several electronic consumer products. For MEMS devices, the packaging determines the performance, reliability, long-term stability and the total cost of the MEMS devices. Therefore, the packaging technology becomes a key issue for successful commercialization of MEMS devices. As the IoT and wearable devices are emerged as a future technology, the importance of the MEMS sensor keeps increasing. However, MEMS devices should meet several requirements such as ultra-miniaturization, low-power, low-cost as well as high performances and reliability. To meet those requirements, several innovative technologies are under development such as integration of MEMS and IC chip, TSV(through-silicon-via) technology and CMOS compatible MEMS fabrication. It is clear that MEMS packaging will be key technology in future MEMS. In this paper, we reviewed the recent development trends of the MEMS packaging. In particular, we discussed and reviewed the recent technology trends of the MEMS bonding technology, such as low temperature bonding, eutectic bonding and thermo-compression bonding.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.313-313
• /
• 2008

Aerosol Deposition(AD) method is based on the impact consolidation phenomenon of ceramic fine particles at room temperature. AD is promising technology for the room temperature deposition of the dielectrics thin films with high quality. Embedding of passive components such as capacitors into printed circuit board is becoming an important strategy for electronics miniaturization and device reliability, manufacturing cost reduction. So, passive integration using aerosol deposition. In this study, we examine the effects of the characteristics of raw powder on the thickness, roughness, electrical properties of $BaTiO_3$ thin films. Thin films were deposited on the copper foil and copper plate. Electrical and material properties was investigated as a change of annealing temperature. We final aim the effects of before and after of laminated on the electrical properties and suit of embedded capacitor.