• Journal of the Institute of Electronics Engineers of Korea SC
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• v.49 no.2
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• pp.1-9
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• 2012

In this paper, we design and implement a DCS (Distributed Control System) based on dual field-bus for ship engine. For monitoring and controlling the condition of the ship engine, an implemented DCS is consisted of two-tier communication structure by using CAN (Controller Area Network) and MODBUS protocols. The first-tier is consisted of CAN protocol for sharing the condition of the ship engine by each implemented monitoring system. By using MODBUS protocol, the second-tier is used for communicating the monitoring data from an implemented DCS to AMS(Alarm Monitoring System). We verified and tested our scheme and implemented DCS by KR (Korea Register) technical rules through experimental tests.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.6
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• pp.1117-1122
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• 2009

In this work, temperature sensor and control circuit for measuring temperature are proposed. The proposed circuit can be fabricated without additional CMOS fabrication process and the output of proposed circuit is digital value. The supply voltage is 5volts and the circuit is designed by using 0.5${\mu}m$ CMOS process. The circuit for measuring temperature consists of PWM control circuit, VCO, counter and register. consisted The frequency of PWM control circuit is 23kHz and the frequency of VCO is 416kHz, 1MHz and 2MHz, respectively. The circuit operation is analyzed by using SPICE.

• Journal of Navigation and Port Research
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• v.38 no.2
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• pp.135-140
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• 2014

The actual observance of hours of rest became one of the main checking items of PSC after enter into force of Maritime Labour Convention in 20 August 2013. And the non-compliances of the rest hours stipulated in the provisions of Seafare's Act of Korea and MLC is occuring and this would be the great obstruction for the shuttle vessels operating between Korea and Japan. In this study, to find the method which could give solution for the observance of provisions of rest hours, the modified duty model, reduction of calling ports and substitute of port duty by shore assistance personnel were reviewed. To comply with the requirement of hours of rest by shuttle vessels operating between Korea and Japan, adoption of the method to reduce calling ports or substitution of port duty by shore personnel are recommended.

• Aerospace Engineering and Technology
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• v.6 no.2
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• pp.79-86
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• 2007

In order to operate Low Earth Orbit(LEO) satellite on space, technical requirements and administrative procedure which are defined by the International Telecommunication Union(ITU) should be followed on satellite development. Main technical requirements to follow are purpose of use, bandwidth, Radio Frequency(RF) intensity, and constraints on new satellite network about existing satellite networks according to frequency spectrum. Such ITU's requirements are reflected and designed on system specification and space to ground interface control document. In order to have a right and protection about using the satellite network on space, the satellite network has to be registered on Master International Frequency Register(MIFR) and procedure for this has to be followed. Coordination with countries raising objection is needed in order to register. And reference and method for coordination are also needed.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.130-137
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• 2013

This paper presents analog front-end(AFE) circuits for bio-potential measurement. The proposed AFE is composed of IA(instrument amplifier), BPF(band-pass filter), VGA(variable gain amplifier) and SAR(successive approximation register) type ADC. The low gm(LGM) circuits with current division technique and Miller capacitance with high gain amplifier enable IA to implement on-chip AC-coupling without external passive components. Spilt capacitor array with capacitor division technique and asynchronous control make the 12-b ADC with low power consumption and small die area. The total current consumption of proposed AFE is 6.3uA at 1.8V.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.4
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• pp.18-26
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• 2001

In this paper, we propose an ATC(Automatic Transfer mode Controller) algorithm and an average-mode-change method for use in Gear shift PLL which can automatically change loop gain. The proposed ATC algorithm accurately detects proper timing or the mode change and has a very simpler structure - than the conventional lock detector algorithm often used in QPSK. And the proposed average mode change method can obtain low errors of estimated frequency offset by averaging the loop filter output of frequency component in shift register. These algorithms are also useful in designing ASIC, since these algorithms occupy small circuit area and are adaptable for high speed digital processing. We also present phase tracking performance of proposed Gear-shift PLL, which is composed of polarity decision PD, ATC and average mode change circuit, and analyze the results by examining constellation at each mode.

• Journal of The Korean Society of Integrative Medicine
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• v.10 no.2
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• pp.187-202
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• 2022

Purpose : This study is a descriptive research study to establish basic data for stable operation of dementia relief center as a part of national responsibility system for dementia and to establish the role of the professional workforce. Methods : This study is a survey study involving 126 nurses working at 19 dementia relief centers. The collected data were analyzed using the SPSS/WIN 23.0. Results : The importance tasks that nurses think of were Dementia Diagnosis, Counseling, Register and Classification and Dementia Preventive Projects. In addition, tasks that showed high performance were in the order of Dementia Diagnosis, Counseling, Register and Classification, Management of Dementia subjects. As a result, the final items of work areas and contents included 45 subcategories of work content for eight work areas. Conclusion : Through this study, it was possible to investigate the overall work area and content of nurses at the Dementia relief Center. It is necessary to develop a work description suitable for nurses who are medical personnel specializing in dementia safety centers. It is necessary to develop a work description suitable for nurses who are medical personnel specializing in dementia safety centers. In connection with the purpose of establishing the centers for disease control and prevention, it is necessary to operate a systematic and continuous program to manage dementia patients and those with mild cognitive impairment in the community.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.12
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• pp.65-72
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• 2008

This paper proposes a new dual-loop digital PLL(DPLL) using seamless frequency tracking methods. The dual-loop construction, which is composed of the coarse and fine loop for fast locking time and a switching noise suppression, is used successive approximation register technique and TDC. The proposed DPLL in order to compensate the quality of jitter which follows long-term of input frequency is newly added cord conversion frequency tracking method. Also, this DPLL has VCO circuitry consisting of digitally controlled V-I converter and current-control oscillator (CCO) for robust jitter characteristics and wide lock range. The chip is fabricated with Dongbu HiTek $0.18-{\mu}m$ CMOS technology. Its operation range has the wide operation range of 0.4-2GHz and the area of $0.18mm^2$. It shows the peak-to-peak period jitter of 2 psec under no power noise and the power dissipation of 18mW at 2GHz through HSPICE simulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.2B
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• pp.1-10
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• 2005

TCP/IP protocols have been implemented in software program running on CPU in end systems. As the increased demand of fast protocol processing, it is required to implement the protocols in hardware, and Host Interface is responsible for communication between external CPU and the hardware blocks of TCP/IP implementation. The Host Interface follows AMBA AHB specification for the communication with external world. For control flow, the Host Interface behaves as a slave of AMBA AHB. Using internal Command/status Registers, the Host Interface receives commands from CPU and transfers hardware status and header information to CPU. On the other hand, the Host Interface behaves as a master for data flow. Data flow has two directions, Receive Flow and Transmit Flow. In Receive Flow, using internal RxFIFO, the Host Interface reads data from UDP FIFO or TCP buffer and transfers data to external RAM for CPU to read. For Transmit Flow, the Host Interface reads data from external RAM and transfers data to UDP buffer or TCP buffer through internal TxFIFO. TCP/IP hardware blocks generate packets using the data and transmit. Buffer Descriptor is one of the Command/Status Registers, and the information stored in Buffer Descriptor is used for external RAM access. Several testcases are designed to verify TCP/IP functions. The Host Interface is synthesized using the 0.18 micron technology, and it results in 173 K gates including the Command/status Registers and internal FIFOs.

• Journal of Internet of Things and Convergence
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• v.6 no.1
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• pp.97-102
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• 2020

Multi-Channel Switch ICs for IoT have integrated several solid state structure low ON-resistance bi-directional relay MOS switches with level shifter to drive high voltage and they should be independently controlled by external serialized logic control. These devices are designed for using in applications requiring high-voltage switching control by low-voltage control signals, such as medical ultra-sound imaging, ink-jet printer control, bare board open/short and leakage test system using Kelvin 4-terminal measurement method. This paper describes implementation of analog switch control block and its verification using Field programmable Gate Array (FPGA) test pattern generation. Each block has been implemented using Verilog hardware description language then simulated by Modelsim and prototyped in a FPGA board. Compare to conventional IC, The proposed architecture can be applied to fields where multiple entities need to be controlled simultaneously in the IoT environment and the proposed pattern generation method can be applied to test similar types of ICs.