• Title/Summary/Keyword: Reference phase

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Cascade 3-Phase IHCML Inverter using maximal distension vector control (최근접 벡터 제어기법을 이용한 Cascade 3상 IHCML 인버터)

  • Song, Sung-Geun;Park, Sung-Jun;Nam, Hae-Kon
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.187-189
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    • 2007
  • In this paper, the cascade 3-phase IHMCL inverter using two low frequency transformers is proposed. The proposed inverter is constructed by connecting a 3-phase IHCML inverter. the cascade 3-phase IHCML inverter has several advantages. One advantage is that only one input power source is required because of using transformers to isolate. Another advantage is that the switching frequency of the high power switches is almost fundamental frequency of reference and the other the switching frequency of the low power switches is higher. It can be known that cascade 3 phase IHCML inverter has the excellent efficiency and the outstanding electric quality. lastly, we tested the 5kW cascade 3-phase IHCML inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed inverter.

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Comparison Between DCM and Quaternion Transformation in Lever Arm Compensation of Reference System for Flight Performance Evaluation of DGPS/INS

  • Park, Ji-Hee;Shin, Dong-Ho
    • Journal of Positioning, Navigation, and Timing
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    • v.1 no.1
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    • pp.45-49
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    • 2012
  • The flight performance evaluation of navigation system is very significant because the reliability of navigation data directly affect the safety of aircraft. Especially, the high-level navigation system such as DGPS/INS, need more precise flight performance evaluation method. The performance analysis is evaluated by comparing between the navigation system in aircraft and reference trajectory which is more precise than navigation system in aircraft. In order to verify DGPS/INS performance of m-level, the GPS receiver, which is capable post-processed Carrier-phase Differential GPS(CDGPS) method of cm-level, have to be used as reference system. The DGPS/INS is estimated the Center of Gravity (CG) point of aircraft to offer precise performance while the reference system is output the position of GPS antenna which is mounted on the outside of aircraft. Therefore, in order to more precise performance evaluation, it needs to compensate the lever arm and coordinates transformation. This paper use quaternion and Direct Cosine Matrix(DCM) methods as coordinate transformation matrix in lever arm compensation of CDGPS reference trajectory. And it compares NED errors of DCM and quaternion transformation in lever arm of reference trajectory via DGPS/INS result.

Model Predictive Control for Shunt Active Power Filter in Synchronous Reference Frame

  • Al-Othman, A.K.;AlSharidah, M.E.;Ahmed, Nabil A.;Alajmi, Bader. N.
    • Journal of Electrical Engineering and Technology
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    • v.11 no.2
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    • pp.405-415
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    • 2016
  • This paper presents a model predictive control for shunt active power filters in synchronous reference frame using space vector pulse-width modulation (SVPWM). The three phase load currents are transformed into synchronous rotating reference frame in order to reduce the order of the control system. The proposed current controller calculates reference current command for harmonic current components in synchronous frame. The fundamental load current components are transformed into dc components revealing only the harmonics. The predictive current controller will add robustness and fast compensation to generate commands to the SVPWM which minimizes switching frequency while maintaining fast harmonic compensation. By using the model predictive control, the optimal switching state to be applied to the next sampling time is selected. The filter current contains only the harmonic components, which are the reference compensating currents. In this method the supply current will be equal to the fundamental component of load current and a part of the current at fundamental frequency for losses of the inverter. Mathematical analysis and the feasibility of the suggested approach are verified through simulation results under steady state and transient conditions for non-linear load. The effectiveness of the proposed controller is confirmed through experimental validation.

Reducing Common-Mode Voltage of Three-Phase VSIs using the Predictive Current Control Method based on Reference Voltage

  • Mun, Sung-ki;Kwak, Sangshin
    • Journal of Power Electronics
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    • v.15 no.3
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    • pp.712-720
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    • 2015
  • A model predictive current control (MPCC) method that does not employ a cost function is proposed. The MPCC method can decrease common-mode voltages in loads fed by three-phase voltage-source inverters. Only non-zero-voltage vectors are considered as finite control elements to regulate load currents and decrease common-mode voltages. Furthermore, the three-phase future reference voltage vector is calculated on the basis of an inverse dynamics model, and the location of the one-step future voltage vector is determined at every sampling period. Given this location, a non-zero optimal future voltage vector is directly determined without repeatedly calculating the cost values obtained by each voltage vector through a cost function. Without utilizing the zero-voltage vectors, the proposed MPCC method can restrict the common-mode voltage within ± Vdc/6, whereas the common-mode voltages of the conventional MPCC method vary within ± Vdc/2. The performance of the proposed method with the reduced common-mode voltage and no cost function is evaluated in terms of the total harmonic distortions and current errors of the load currents. Simulation and experimental results are presented to verify the effectiveness of the proposed method operated without a cost function, which can reduce the common-mode voltage.

Implementation of Single-Phase Energy Measurement IC (단상 에너지 측정용 IC 구현)

  • Lee, Youn-Sung;Seo, Hae-Moon;Kim, Dong Ku
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.12
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    • pp.2503-2510
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    • 2015
  • This paper presents a single-phase energy measurement IC to measure electric power quantities. The entire IC includes two programmable gain amplifiers (PGAs), two ${\sum}{\Delta}$ modulators, a reference circuit, a low-dropout (LDO) regulator, a temperature sensor, a filter unit, a computation engine, a calibration control unit, registers, and an external interface block. The proposed energy measurement IC is fabricated with $0.18-{\mu}m$ CMOS technology and housed in a 32-pin quad-flat no-leads (QFN) package. It operates at a clock speed of 4,096 kHz and consumes 10 mW in 3.3 V supply.

Output Voltage Control of Z-Source Inverter by the Detection of the Input DC Voltage and Z-Network Capacitor Voltage (입력 직류 전압과 Z-네트워크 커패시터 전압 검출에 의한 Z-소스 인버터의 출력 전압 제어)

  • Kim, Se-Jin;Jung, Young-Gook;Lim, Young-Cheol;Choi, Joon-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.8
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    • pp.1515-1522
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    • 2011
  • This paper proposes the algorithm for the output AC voltage control of Z-source inverter by the detection of the input DC voltage and Z-network capacitor voltage. The actual modulation index of the proposed method is detected by the capacitor voltage in Z-network and input DC voltage of three-phase Z-source inverter. Control modulation index for the output voltage control is calculated by the detected actual modulation index and reference modulation index. And, calculated control modulation index is applied to the modified space vector modulation (SVM) for control the output voltage of Z-source inverter. To verify the validity of the proposed method, PSIM simulation was achieved and a DSP controlled 1[kW] three-phase Z-source inverter was producted. The simulation and experiment were performed under the condition that the load was changed in case of the constant input DC voltage and the input DC voltage was changed in case of the load was constant. As a result, we could know that the output phase voltage of Z-source inverter followed to the reference voltage 70[VRMS] despite the load or the input DC voltage were suddenly changed.

Dead Time Compensation of Stand-alone Inverter Under Unbalanced Load (불평형부하 시 독립형 인버터의 데드타임 보상기법)

  • Jeong, Jinyong;Jo, Jongmin;Lee, Junwon;Chae, Woo-Kyu;Cha, Hanju
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.2
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    • pp.115-121
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    • 2015
  • Stand-alone inverter supplies constant voltage to loads. However, when a three-phase stand-alone inverter supplies unbalanced load, the generated output voltages also become unbalanced. The nonlinear characteristics of inverter dead time cause a more serious distortion in the output voltage. With unbalanced load, voltage distortion caused by dead time differs from voltage distortion under balanced load. Phase voltages in the stationary reference frame include unbalanced odd harmonics and then, d-q axis voltages in the synchronous reference frame have even harmonics with different magnitude, which are mitigated by the proposed multiple resonant controller. This study analyzes the voltage distortion caused by unbalanced load and dead time, and proposes a novel dead time compensation method. The proposed control method is tested on a 10-kW stand-alone inverter system, and shows that total harmonic distortion (THD) is reduced to 1.5% from 4.3%.

A Clock and Data Recovery Circuit with Adaptive Loop Bandwidth Calibration and Idle Power Saved Frequency Acquisition

  • Lee, Won-Young;Jung, Chae Young;Cho, Ara
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.4
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    • pp.568-576
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    • 2017
  • This paper presents a clock and data recovery circuit with an adaptive loop bandwidth calibration scheme and the idle power saved frequency acquisition. The loop bandwidth calibration adaptively controls injection currents of the main loop with a trimmable bandgap reference circuit and trains the VCO to operate in the linear frequency control range. For stand-by power reduction of the phase detector, a clock gating circuit blocks 8-phase clock signals from the VCO and cuts off the current paths of current mode D-flip flops and latches during the frequency acquisition. 77.96% reduction has been accomplished in idle power consumption of the phase detector. In the jitter experiment, the proposed scheme reduces the jitter tolerance variation from 0.45-UI to 0.2-UI at 1-MHz as compared with the conventional circuit.

A Single-Input Single-Output Approach by using Minor-Loop Voltage Feedback Compensation with Modified SPWM Technique for Three-Phase AC-DC Buck Converter

  • Alias, Azrita;Rahim, Nasrudin Abd.;Hussain, Mohamed Azlan
    • Journal of Power Electronics
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    • v.13 no.5
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    • pp.829-840
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    • 2013
  • The modified sinusoidal pulse-width modulation (SPWM) is one of the PWM techniques used in three-phase AC-DC buck converters. The modified SPWM works without the current sensor (the converter is current sensorless), improves production of sinusoidal AC current, enables obtainment of near-unity power factor, and controls output voltage through modulation gain (ranging from 0 to 1). The main problem of the modified SPWM is the huge starting current and voltage (during transient) that results from a large step change from the reference voltage. When the load changes, the output voltage significantly drops (through switching losses and non-ideal converter elements). The single-input single-output (SISO) approach with minor-loop voltage feedback controller presented here overcomes this problem. This approach is created on a theoretical linear model and verified by discrete-model simulation on MATLAB/Simulink. The capability and effectiveness of the SISO approach in compensating start-up current/voltage and in achieving zero steady-state error were tested for transient cases with step-changed load and step-changed reference voltage for linear and non-linear loads. Tests were done to analyze the transient performance against various controller gains. An experiment prototype was also developed for verification.