• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.10
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• pp.1317-1326
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• 1999

As the integration ratio and operation speed increase, it has become an important problem to estimate the dissipated power during the design procedure as a method to reduce the TTM(time to market). This paper proposed a prediction model to estimate the maximum dissipated power of a CMOS logic gate. This model uses a calculational method. It was formed by including the characteristics of MOSFETs of which a CMOS gate consists, the operational characteristics of the gate, and the characteristics of the input signals. As the modeling process, a maximum power estimation model for CMOS inverter was formed first, and then a conversion model to convert a multiple input CMOS gate into a corresponding CMOS inverter was proposed. Finally, the power model for inverter was applied to the converted result so that the model could be applied to a general CMOS gate. For experiment, several CMOS gates were designed in layout level by $0.6{\mu}m$ layout design rule. The result by comparing the calculated results with those from HSPICE simulations for the gates showed that the gate conversion model has within 5% of the relative error rate to the SPICE and the maximum power estimation model has within 10% of the relative error rate. Thus, the proposed models have sufficient accuracies. Also in calculation time, the proposed models was more than 30 times faster than SPICE simulation. Consequently, it can be said that the proposed model could be used efficiently to estimate the maximum dissipated power of a CMOS logic gate during the design procedure.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.104-110
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• 2008

In this paper, a novel 2-level-search sphere decoding algorithm for multiple-input multiple-output (MIMO) detection and its VLSI implementation are presented. The proposed algorithm extends the search space by concurrently performing symbol detection on 2 level of the tree search. Therefore, the possibility of discarding good candidates can be avoided. Simulation results demonstrate the good performance of the proposed algorithm in terms of bit-error-rate (BER). From the proposed algorithm, an efficient very large scale integration (VLSI) architecture which incorporates low-complexity and fixed throughput features is proposed. The proposed architecture supports many modulation techniques such as BPSK, QPSK, 16-QAM and 64-QAM. The sorting block, which occupies a large portion of hardware utilization, is shared for different operating modes to reduce the area. The proposed hardware implementation results show the improvement in terms of area and BER performance compared with existing architectures.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.44-51
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• 2008

A stereo audio digital-to-analog converter (DAC) with a power amplifier using asymmetric pulse-width modulation (PWM) is presented. To adopt class-D amplifier mainly used in high-power audio appliances for head-phones application, this work analyzes the noise caused by the inter-channel interference during the integration and optimizes the design of the sigma-delta modulator to decrease the performance degradation caused by the noise. The asymmetric PWM is implemented to reduce switching noise and power loss generated from the power amplifier. This proposed architecture is fabricated in 0.13-mm CMOS technology. The proposed audio DAC including the power amplifier with single-ended output achieves a dynamic range (DR) of 95-dB dissipating 4.4-mW.

• Journal of IKEEE
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• v.17 no.4
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• pp.440-445
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• 2013

This paper proposes a local estimation system which combines Cell Divide Algorithm with low-cost GPS/INS fused by Extended Kalman Filter(EKF) for localization of Quad-rotor when it returns to the departure point. In the research, the low-cost GPS and INS are fused by EKF to reduce the local error of low-cost GPS and the accumulative error of INS due to continuous integration of sensor error values. When the Quad-rotor returns to the departure point in the fastest path, a moving path can be known because it moves straight, where Cell Divide Algorithm is used to divide moving route into the cells. Then it determines the closest position of data of GPS/INS system fused by EKF to obtain the improved local data. The proposed system was verified through comparing experimental localization results obtained by using GPS, GPS/INS and GPS/INS with Cell Divide Algorithm respectively.

• The Korean Journal of Emergency Medical Services
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• v.6 no.1
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• pp.27-37
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• 2002

The health and medical service attracts more public attention as the economy of Korea is rapidly growing up and the standard of living is elevated. Especially, the interest and demand on the prehospital emergency medical service that consists of the important part of primary medical service that is directly related to the life of patients are gradually increased. However, as compared with other advanced countries such as America in this area, Korea actually fell behind in the utilization of IT (Information Technology) to maximize the efficiency of emergency service system as well as has a problem in the general service system. This study suggested the necessity to introduce EMD (Emergency Medical Dispatch) system that takes a great role as the core part in the prehospital emergency medical service that is not systemized in Korea yet. In addition, this study proposed the implementation model of EMD ASP system using ASP (Application Service Provider) in EMD system to flexibly deal with the change of IT and efficient implementation and integration of information system as well as to significantly reduce cost through wire/wireless high speed Internet network that is politically promoted in Korea on the basis of EMD. The system analysis and design was executed by HIPO (Hierarchy Plus Input Process Output) analysis that was the conceptual design technology for EMD information system modeling based on ASP and DFD (Data Flow Diagram). This study proposed DB table configuration and data schema to implement the application of web browser interface in EMD system through ERD(ER-Diagram) of EMD ASP system. Finally, this study described how to implement and utilize EMD information system. This study aims to facilitate the qualitative development of emergency medical service in the future as suggesting the concrete models for the implementation of high value-added prehospital emergency medical information system as applying ASP concept to EMD system of prehospital emergency medical service area.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.41 no.2
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• pp.127-133
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• 2013

In this paper, the study for the manufacture of the integrated composite wing is performed. The wing has a pivoting structure and high aspect ratio to increase lift drag ratio. The wing is designed with carbon fiber composite because the wing needs to be light and have sufficient strength and stiffness to satisfy structural design requirements. The number of structural members is decreased by part integration to reduce manufacturing cost and the wing is manufactured with the integrated molding process by an autoclave. The material properties are identified by the coupon tests and the structural strength and stiffness are verified through the component tests.

• Transactions of the KSME C: Technology and Education
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• v.3 no.3
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• pp.183-191
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• 2015

In this study, the finite element analysis was carried out to investigate dynamic characteristics of the AGF(Active Gurney Flap) which is under development for reducing vibration and noise of the helicopter rotor system. The Gurney flap is a kind of small flat plate, mounted normal to the lower surface of the airfoil near to the trailing edge. An electric motor, L-shaped linkages and flap parts were integrated into a rotor bade, and 3~5/rev control was given to the AGF to reduce the vibration in the fixed frame. Thus, an explicit time integration method was adopted to investigate the dynamic response of the AGF with considering both centrifugal force due to the rotor rotation and active control input, and it can be seen that the vertical displacement of the AGF was satisfied to meet the design requirement.

• Journal of IKEEE
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• v.6 no.1 s.10
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• pp.47-53
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• 2002

This paper manufacturing one system and use this separatively, plan, and embody system that apply integration design method in research about characteristic of internal core of 8051 micro-processors and system reusability so that can use as module of other system. The proposed system itself by object style so that reusability may be possible in proposed method and object style for connection between this systems is required. Set on these request and when systems have own information and were linked with other systems, by supplying own information automatic movement itself is realized and system itself embodies ashes so that can be applied to other system. The proposed method in this paper analyzes and compares with existent Z-80 education board, as well as system that propose offers extensibility, it handles most function to software and development period, expense and baud dimension confirmed advantage of and so on that reduce. Also, design for object style system architecture and showed feature that extensibility and portability are augmented.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.10
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• pp.53-58
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• 2008

This paper proposes a new set of instructions to improve the packet processing capacity of a network processor. The proposed set of instructions is able to achieve more efficient packet processing by accelerating integration of packet headers. Furthermore, a hardware configuration dedicated to processing overlay instructions was designed to reduce additional hardware cost. For this purpose, the basic architecture for the network processor was designed using LISA and the overlay block was optimized based on the barrel shifter. The block was synthesized to compare the area and the operation delay, and allocated to a C-level macro function using the compiler known function (CKF). The improvement in performance was confirmed by comparing the execution cycle and the execution time of an application program. Experiments were conducted using the processor designer and the compiler designer from Coware. The result of synthesis with the TSMC ($0.25{\mu}m$) from Synopsys indicated a reduction in operation delay by 20.7% and an improvement in performance of 30.8% with the proposed set of instructions for the entire execution cycle.

• Journal of the Economic Geographical Society of Korea
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• v.2 no.1_2
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• pp.83-102
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• 1999

The aim of this paper is to explore the trend and structural features of unemployment in Germany and to review the local and regional labour market policy against the unemployment. Unemployment has been one of the major issues in Germany since the oil shocks oi 1973-74 and 1978-80. The unemployment rate in western Germany was low at the time of reunification in 1990 and the next consecutive two years. Since then, the unemployment rate has sharply risen due to the restructuring of industries. In an effort to reduce the unemployment and to search (or new employment policies, the specific roles and advantages of communal units have been appreciated. The local and/or regional labour market policies are characterized as fellows: the corporative networking of all the agents including local administration, education institutes, regional labour bureau, firms and interest groups; the systematic integration of the various instruments which have been separately installed by different sectors; and the target-oriented adjustment of labour market approaches in the local circumstances.