• 한국정보기술학회논문지
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• 제16권11호
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• pp.23-34
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• 2018

본 논문에서는 고효율 고역률 LED 조명장치용 전원공급장치를 제안한다. 제안한 전원공급장치는 풀브리지 다이오드 정류기와 플라이백 컨버터로 구성된 단일단 전력구조이며, 이에 따라 하나의 제어기 IC와 하나의 전력반도체스위치만을 사용하여 역률개선과 출력전압조정을 동시에 수행한다. 또한 제안한 전원공급장치는 회생스너버를 이용하여 주스위치의 전압스트레스와 스위칭손실을 감소시키며, 동기정류기를 이용하여 시스템 효율을 향상한다. 적용된 동기정류기는 새로운 전압구동형이며 동작과 구성이 간단하다. 본 논문에서는 역률개선부와 주전력변환부의 동작분석을 통하여 제안한 전원공급장치의 동작원리를 설명하고 동기정류기의 동작에 관하여 간략하게 설명한다. 또한 40W급 프로토타입 전력회로의 설계예시를 제시하며, 설계된 회로파라미터들에 의해 제작된 프로토타입의 실험 결과를 통하여 제안한 전원공급장치의 동작특성을 입증한다.

• 한국산학기술학회논문지
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• 제12권10호
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• pp.4561-4568
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• 2011

본 논문에서는 비엔나 정류기의 전압제어를 위한 반송파 비교 PWM 방법에 대하여 논한다. 일반적으로 산업용 및 통신용 등 여러 응용분야에서 2레벨 정류기가 주로 사용되어 왔다. 하지만 2레벨 정류기는 효율을 높이고, THD를 낮추는데 한계가 있기 때문에 3레벨 정류기에 대한 연구가 진행 되어 왔다. 3레벨 정류기의 대표적인 회로가 비엔나 정류기이다. 기존의 비엔나 정류기는 대부분 전압 명령으로부터 인가 공간전압 벡터를 선택하고, 공간전압 벡터 인가시간을 직접 계산하여, 그 시간동안 전압 명령을 인가하는 공간 전압 변조 방식이 사용된다. 하지만 이 방법은 전압 명령 생성 및 전압 벡터의 인가시간 계산이 매우 복잡하여, 구현이 어려운 단점이 있다. 이 단점을 보완하기 위해 기존의 3레벨 인버터에 사용되던 반송파 비교 PWM 방법을 비엔나 정류기에 적용할 수 있도록 수정하여, 비엔나 정류기를 위한 간단한 전압제어를 위한 반송파 비교 PWM방식을 도출하고 시뮬레이션 및 실험을 통해 검증 한다.

• Journal of Power Electronics
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• 제5권3호
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• pp.233-239
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• 2005

In this paper, a new conceptual circuit configuration of a 3-phase voltage source, soft switching AC-DC-AC converter using an IGBT module, which has one ARCPL circuit and one ARDCL circuit, is presented. In actuality, the ARCPL circuit is applied in the 3-phase voltage source rectifier side, and the ARDCL circuit is in the inverter side. And more, each power semiconductor device has a novel clamp snubber circuit, which can save the power semiconductor device from voltage and current across each power device. The proposed soft switching circuits have only two active power semiconductor devices. These ARCPL and ARDCL circuits consist of fewer parts than the conventional soft switching circuit. Furthermore, the proposed 3-phase voltage source soft switching AC-DC-AC power conversion system needs no additional sensor for complete soft switching as compared with the conventional 3-phase voltage source AC-DC-AC power conversion system. In addition to this, these soft switching circuits operate only once in one sampling term. Therefore, the power conversion efficiency of the proposed AC-DC-AC converter system will get higher than a conventional soft switching converter system because of the reduced ARCPL and ARDCL circuit losses. The operation timing and terms for ARDCL and ARCPL circuits are calculated and controlled by the smoothing DC capacitor voltage and the output AC current. Using this control, the loss of the soft switching circuits are reduced owing to reduced resonant inductor current in ARCPL and ARDCL circuits as compared with the conventional controlled soft switching power conversion system. The operating performances of proposed soft switching AC-DC-AC converter treated here are evaluated on the basis of experimental results in a 50kVA setup in this paper. As a result of experiment on the 50kVA system, it was confirmed that the proposed circuit could reduce conduction noise below 10 MHz and improve the conversion efficiency from 88. 5% to 90.5%, when compared with the hard switching circuit.

• Journal of Power Electronics
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• 제15권3호
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• pp.587-601
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• 2015

A high step-up dc-dc converter is proposed for photovoltaic power systems in this paper. The proposed converter consists of an input current doubler, a symmetrical switched-capacitor doubler and an active-clamp circuit. The input current doubler minimizes the input current ripple. The symmetrical switched-capacitor doubler is composed of two symmetrical quasi-resonant switched-capacitor circuits, which share the leakage inductance of the transformer as a resonant inductor. The rectifier diodes (switched-capacitor circuit) are turned off at the zero current switching (ZCS) condition, so that the reverse-recovery problem of the diodes is removed. In addition, the symmetrical structure results in an output voltage ripple reduction because the voltage ripples of the charge/pump capacitors cancel each other out. Meanwhile, the voltage stress of the rectifier diodes is clamped at half of the output voltage. In addition, the active-clamp circuit clamps the voltage surges of the switches and recycles the energy of the transformer leakage inductance. Furthermore, pulse-width modulation plus phase angle shift (PPAS) is employed to control the output voltage. The operation principle of the converter is analyzed and experimental results obtained from a 400W prototype are presented to validate the performance of the proposed converter.

• Journal of Electrical Engineering and Technology
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• 제12권3호
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• pp.1156-1165
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• 2017

A high performance interleaved bridgeless boost power factor correction (PFC) rectifier operating under the critical current conduction mode (CrM) is proposed in this paper to improve the efficiency and system performance of various applications, such as nano-grid systems. By combining the interleaved technique with the bridgeless topology, the circuit contains two independent branches without rectifier diodes. The branches operate in interleaved mode for each respective half-line period. Moreover, when operating in CrM, all the power switches take on soft-switching, thereby reducing switching losses and raising system efficiency. In addition, the input current flows through a minimum amount of power devices. By employing a commercial PFC controller, an effective control scheme is used for the proposed circuit. The operating principle of the proposed circuit is presented, and the design considerations are also demonstrated. Simulations and experiments have been carried out to evaluate theoretical analysis and feasibility of the proposed circuit.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 추계학술대회
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• pp.419-422
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• 2011

본 논문에서는 초저전력 어플리케이션을 위한 이중입력 자가 전력관리 시스템을 제안한다. 자가 발전 시스템의 전력 공급원으로는 PZT와 solar cell소자를 병합하여 사용한다. 제한된 전력관리 회로는 solar cell 출력 전압을 승압하기 위한 charge pump 회로, PZT의 출력을 DC로 변환하기 위한 rectifier, 수확된 에너지를 병합 및 관리하기 위한 전력관리회로로 구성된다. 설계된 회로는 CMOS 0.18um technology를 이용하여 성능을 검증하였다. 설계된 회로의 칩 면적은 $295um{\times}275um$ 이다.

• Transactions on Electrical and Electronic Materials
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• 제11권1호
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• pp.20-23
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• 2010

The analog front end (AFE) of a radio frequency identification transponder using the ISO 14443 type A standard with a 100% amplitude shift keying (ASK) modulation is proposed in this paper and verified by circuit simulations and measurements. This AFE circuit, using a 13.56 MHz carrier frequency, consists of a rectifier, a modulator, a demodulator, a regulator, a power on reset, and a dynamically enabled digital phase locked loop (DPLL). The DPLL, with a charge pump enable circuit, was used to recover the clock of a 100% modulated ASK signal during the pause period. A high voltage lateral double diffused metal-oxide semiconductor transistor was used to protect the rectifier and the clock recovery circuit from high voltages. The proposed AFE was fabricated using the $0.18\;{\mu}m$ standard CMOS process, with an AFE core size of $350\;{\mu}m\;{\times}\;230\;{\mu}m$. The measurement results show that the DPLL, using a demodulator output signal, generates a constant 1.695 MHz clock during the pause period of the 100% ASK signal.

• Journal of Power Electronics
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• 제15권3호
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• pp.621-633
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• 2015

This paper proposes the analysis and design of a DC-side symmetrical zero-current-switching (ZCS) Class-D current-source driven resonant rectifier to improve the low power-factor and high line current harmonic distortion of lighting applications. An analysis of the junction capacitance effect of Class-D ZCS rectifier diodes, which has a significant impact on line current harmonic distortion, is discussed in this paper. The design procedure is based on the principle of the symmetrical Class-D ZCS rectifier, which ensures more accurate results and provides a more systematic and feasible analysis methodology. Improvement in the power quality is achieved by using the output characteristics of the DC-side Class-D ZCS rectifier, which is inserted between the front-end bridge-rectifier and the bulk-filter capacitor. By using this symmetrical topology, the conduction angle of the bridge-rectifier diode current is increased and the low line harmonic distortion and power-factor near unity were naturally achieved. The peak and ripple values of the line current are also reduced, which allows for a reduced filter-inductor volume of the electromagnetic interference (EMI) filter. In addition, low-cost standard-recovery diodes can be employed as a bridge-rectifier. The validity of the theoretical analysis is confirmed by simulation and experimental results.

• Journal of Power Electronics
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• 제5권1호
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• pp.67-75
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• 2005

A high efficiency ZVS PWM asymmetrical half bridge converter for a plasma display panel (PDP) sustaining power modules is proposed in this paper. To achieve the ZVS of power switches for the wide load range, a small additional inductor L/sub 1kg/, which also acts as an output filter inductor, is serially inserted into the transformer's primary side. At that point, to solve the problem of ringing in the secondary rectifier caused by L/sub 1kg/, the proposed circuit employs a structure without the output filter inductor, which helps the voltages across rectifier diodes to be clamped at the output voltage. Therefore, no dissipative RC (resistor capacitor) snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since it has no large output inductor filter, the asymmetrical half bridge converter features a simpler structure, lower cost, less mass, and lighter weight. In addition, since all energy stored in L/sub 1kg/ is transferred to the output side, the circulating energy problem can be effectively solved. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385Vdc/170Vdc prototype are presented.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.537-541
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• 2004

A high efficiency ZVS PWM asymmetrical half bridge converter for a plasma display panel (PDP) sustaining power module is proposed in this paper. To achieve the ZVS of power switches for the wide fond range, n small additional inductor $L_{lkg}$, which also acts as an output filter inductor, is serially inserted to the transformer primary side. Then, to solve the problem related to ringing in the secondary rectifier caused by $L_{lkg}$, the proposed circuit employs a structure without the output filter inductor, which helps the voltages across rectifier diodes to be clamped at the output voltage. Therefore, no dissipative RC (resistor capacitor) snubber for rectifier diodes is needed and n high efficiency as well as low noise output voltage can be realized. In addition, since it has no large output inductor filter, it features a simpler structure, lower cost, less mass, and lighter weight. Moreover, since all energy stored in $L_{lkg}$ is transferred to the output side, the circulating energy problem can be effectively solved. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385Vdc/170Vdc prototype are presented.