• Proceedings of the Korean Society of Surveying, Geodesy, Photogrammetry, and Cartography Conference
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• 2010.04a
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• pp.181-182
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• 2010

For real-time displacement monitoring of large-scale structures, the high-rate (>1 Hz) GPS data processing is necessary, which is not possible even for the scientific GPS data processing softwares. Since the baseline is generally very short in this case, most of the atmospheric effects are removed, resulting in the unknowns of position and integer ambiguity. The number of unknowns in real-time kinematic GPS positioning makes the positioning impossible with usual approach, thus two-step approach is tested in this study.

• Smart Structures and Systems
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• v.14 no.6
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• pp.1131-1150
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• 2014

One of the issues in extending the range of applicable problems of real-time hybrid simulation is the computation speed of the simulator when large-scale computational models with a large number of DOF are used. In this study, functionality of real-time dynamic simulation of MDOF systems is achieved by creating a logic circuit that performs the step-by-step numerical time integration of the equations of motion of the system. The designed logic circuit can be implemented to an FPGA-based system; FPGA (Field Programmable Gate Array) allows large-scale parallel computing by implementing a number of arithmetic operators within the device. The operator splitting method is used as the numerical time integration scheme. The logic circuit consists of blocks of circuits that perform numerical arithmetic operations that appear in the integration scheme, including addition and multiplication of floating-point numbers, registers to store the intermediate data, and data busses connecting these elements to transmit various information including the floating-point numerical data among them. Case study on several types of linear and nonlinear MDOF system models shows that use of resource sharing in logic synthesis is crucial for effective application of FPGA to real-time dynamic simulation of structural response with time step interval of 1 ms.

• International Journal of Aeronautical and Space Sciences
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• v.17 no.4
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• pp.467-475
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• 2016

Ultrasonic propagation imaging (UPI) has shown great potential for detection of impairments in complex structures and can be used in wide range of non-destructive evaluation and structural health monitoring applications. The software implementation of such algorithms showed a tendency in time-consumption with increment in scan area because the processor shares its resources with a number of programs running at the same time. This issue was addressed by using field programmable gate arrays (FPGA) that is a dedicated processing solution and used for high speed signal processing algorithms. For this purpose, we need an independent and flexible block of logic which can be used with continuously evolvable hardware based on FPGA. In this paper, we developed an FPGA-based ultrasonic propagation imaging system, where FPGA functions for both data acquisition system and real-time ultrasonic signal processing. The developed UPI system using FPGA board provides better cost-effectiveness and resolution than digitizers, and much faster signal processing time than CPU which was tested using basic ultrasonic propagation algorithms such as ultrasonic wave propagation imaging and multi-directional adjacent wave subtraction. Finally, a comparison of results for processing time between a CPU-based UPI system and the novel FPGA-based system were presented to justify the objective of this research.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.835-838
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• 2000

Popular methods for extracting a text region in video images are in general based on analysis of a whole image such as merge and split method, and comparison of two frames. Thus, they take long computing time due to the use of a whole image. Therefore, this paper suggests the faster method of extracting a text region without processing a whole image. The proposed method uses line sampling methods, FFT and neural networks in order to extract texts in real time. In general, text areas are found in the higher frequency domain, thus, can be characterized using FFT The candidate text areas can be thus found by applying the higher frequency characteristics to neural network. Therefore, the final text area is extracted by verifying the candidate areas. Experimental results show a perfect candidate extraction rate and about 92% text extraction rate. The strength of the proposed algorithm is its simplicity, real-time processing by not processing the entire image, and fast skipping of the images that do not contain a text.

• The Transactions of the Korea Information Processing Society
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• v.6 no.2
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• pp.449-458
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• 1999

In real-time systems, the accurate response time and minimal communication delay is highly desired. However, a conventional SNMP uses network resources inefficiently and introduces too much network traffic for periodic requests in particular. This paper presents an extended SNMP called Real-Time SNMP. It is designed to support real-time applications with time constraints to provide more accurate response time and less network traffic for periodic SNMP request PDU which is sent from a management station to agents. In addition, the module of the Real-Time SNMP agent works between management station and each SNMP agent to periodically generate requests for the associated agent. In this paper we have implemented the proposed Real-Time SNMP agent module and extended SNMP PDU. We also show the experimental results that indicated more punctual response time and reduced communication delay using the proposed Real-Time SNMP.

• Journal of the Korea Society for Simulation
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• v.26 no.3
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• pp.13-22
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• 2017

This research proposes and applies a pipelining parallel processing technique to enhance the speed of visualizing the results of real-time simulations. Generally, a simulation with real-time visualization consists of three processes: executing a simulation model, transmitting simulation result, and visualizing simulation result. If we have these processes in serial, the latency from simulation to visualization will be very long, which degrades the speed of visualization of data from real-time simulation. Thus, the main purpose of this research is maximizing performance by adapting pipelining parallel processing technique to the real-time simulation visualization. Also we show that performance is improved by adding multi-threading technique to each process. This paper proposes a theoretical performance model and simulation results of the techniques and then we applied this to an air combat simulation model as a case study. As the result, it shows that the performance is greatly enhanced than the original model's execution time.

• Proceedings of the Korea Information Processing Society Conference
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• 2001.10b
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• pp.1427-1430
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• 2001

액티브 네트워크는 기존의 패킷 교환 네트워크와 달리 네트워크 중간 노드에서 사용자의 요구나 서비스 특성에 따라 패킷을 처리할 수 있는 차세대 네트워크 구조이다. 기존의 네트워크 문제점을 개선하고 네트워크에 지능을 부여한다는 측면에서 새로운 접근 방식이지만 아직 해결해야 할 많은 논지를 가지고 있다. 본 논문은 액티브 네트워크와 기존의 네트워크 공존문제를 해결, 관리하기 위한 SNMP 확장에 관한 모델을 제시하고, SNMP 기반의 네트워크와 비교 분석하기로 한다.

• Proceedings of the KOSOMBE Conference
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• v.1998 no.11
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• pp.78-79
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• 1998

This paper describes a real time algorithm for blood flow estimation of LDF(laser Doppler flowmeter). Many algorithms for blood flow estimation are using power spectral density of Doppler signal by blood flow. In these research, the fast Fourier transformation is used to estimate power spectral density. This is a block processing procedure rather than real time processing. The algorithm in this paper used parametric spectral estimation. This has real time capability by estimation of AR(autoregressive) parameters sample by sample, and has smoothing power spectrum. Also, the frequency resolution is not limited by number of samples used to estimate AR parameter. Another advantage of this algorithm is that AR model enhance SNR.

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.3
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• pp.173-182
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• 2014

The CRT monitor display system for SONAR signal that are commonly used in ships or naval vessels uses vector scanning method. Therefore the processing circuits of the system are complex. Also the purchase of parts is difficult as well as high-cost because the production had been shut down. FPGA-based embedded system is flexible to various digital applications because it can be able to simplify processing circuits and to make a easy customized design for end user, and it provides low-cost high-speed performance. In this paper, we describe an implementation of FPGA embedded system for real-time SONAR signal display using the triple buffering method to overcome some weakness of existing CRT system. Our system provides real-time acquisition and display capability of SONAR signal, and removes afterimage effect that is a critical problem of the system proposed in the preceding study.

• Journal of Information Processing Systems
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• v.7 no.1
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• pp.1-16
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• 2011

With the increasing number of vehicles in use in our daily life and the rise of traffic congestion problems, many methods and models have been developed for real time optimisation of traffic lights. Nevertheless, most methods which consider real time physical queue sizes of vehicles waiting for green lights overestimate the optimal cycle length for such real traffic control. This paper deals with the development of a generic hybrid model describing both physical traffic flows and control of signalised intersections. The firing times assigned to the transitions of the control part are considered dynamic and are calculated by a simplified optimisation method. This method is based on splitting green times proportionally to the predicted queue sizes through input links for each new cycle time. The proposed model can be easily translated into a control code for implementation in a real time control system.