• 한국태양에너지학회:학술대회논문집
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• 2009.04a
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• pp.230-234
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• 2009

It is significant technique to increase competitiveness that solar cells have a high energy conversion efficiency and cost effectiveness. When making high efficiency crystalline Si solar cells, evaporated Ti/Pd/Ag contact system is widely used in order to reduce the electrical resistance of the contact fingers. However, the evaporation process is no applicable to mass production because high vacuum is needed. Furthermore, those metals are too expensive to be applied for terrestrial applications. Ni/Cu/Ag contact system of silicon solar cells offers a relatively inexpensive method of making electrical contact. Ni silicide formation is one of the indispensable techniques for Ni/Cu/Ag contact sytem. Ni was electroless plated on the front grid pattern, After Ni electroless plating, the cells were annealed by RTP(Rapid Thermal Process). Ni silicide(NiSi) has certain advantages over Ti silicide($TiSi_2$), lower temperature anneal, one step anneal, low resistivity, low silicon consumption, low film stress, absence of reaction between the annealing ambient. Ni/Cu/Ag metallization scheme is an important process in the direction of cost reduction for solar cells of high efficiency. In this article we shall report an investigation of rapid thermal silicidation of nickel on silngle crystalline silicon wafers in the annealing range of $350-390^{\circ}C$. The samples annealed at temperatures from 350 to $390^{\circ}C$ have been analyzed by SEM(Scanning Electron Microscopy).

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.53-60
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• 2014

Different kinds of post-deposition annealing (PDA) by a rapid thermal process (RTP) are used to enhance the field-effect passivation of $Al_2O_3$ film in crystal Si solar cells. To characterize the effects of PDA on $Al_2O_3$ and the interface, metal-insulator semiconductor (MIS) devices were fabricated. The effects of PDA were characterized as functions of RTP temperature from $400{\sim}700^{\circ}C$ and RTP time from 30~120 s. A high temperature PDA can retard the passivation of thin $Al_2O_3$ film in c-Si solar cells. PDA by RTP at $400^{\circ}C$ results in better passivation than a PDA at $400^{\circ}C$ in forming gas ($H_2$ 4% in $N_2$) for 30 minutes. A high thermal budget causes blistering on $Al_2O_3$ film, which degrades its thermal stability and effective lifetime. It is related to the film structure, deposition temperature, thickness of the film, and annealing temperature. RTP shows the possibility of being applied to the PDA of $Al_2O_3$ film. Optimal PDA conditions should be studied for specific $Al_2O_3$ films, considering blistering.

• Journal of the Korean Vacuum Society
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• v.12 no.4
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• pp.269-274
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• 2003

The electrical, optical and structural properties of ZnNiO thin _ films deposited on Si substrates using rf-magnetron sputtering method have been investigated before and after the thermal annealing processes. The crystallinity of the ZnNiO thin film become degraded with increasing the Ni contents. This is mainly because the lattice of the thin film was expanded due to the oxygen-deficient conditions. Concerning the electrical properties of the thin film, the carrier concentration increases ($6.81\times10^{14}\textrm{cm}^{-2}$) and Hall mobility decreases (36.3 $\textrm{cm}^2$/Vㆍs) with higher doping concentration of Ni. However, the carrier concentration and Hall mobility became low ($1.10\times10^{14}\textrm{cm}^2$ and high (209.6 $\textrm{cm}^2$/Vㆍs), respectively, after the thermal annealing process at $1000 ^{\circ}C$. We also observed a strong luminescene center peaking at 546 nm in photoluminescence spectra, which was caused by a deep level center in the ZnO band gap with oxygen deficient ZnNiO structure.

• Korean Journal of Materials Research
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• v.12 no.5
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• pp.382-386
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• 2002

We studied growth and characterization of $SrBi_2Ta_2O_9$ (SBT) thin films fabricated by low temperature process under vacuum and/or oxygen ambient. A metal organic decomposition (MOD) method based on a spin-on technique and annealing process using a rapid thermal annealing (RTA) method was used to prepare the SBT films. The crystallinity of a ferroelectric phase of SBT thin films is related to the oxygen partial pressure during RTA process. Under an oxygen partial pressure higher than 30 Torr, the crystallization temperature inducing the ferroelectric SBT phase can be lowered to $650^{\circ}C$. Those films annealed at $650^{\circ}C$ in vacuum and oxygen ambient showed good ferroelectric properties, that is, the memory window of 0.5~0.9 V at applied voltage of 3~7 V and the leakage current density of 1.80{\times}10^{-8}$ A/$\textrm{cm}^2$ at an applied voltage of 5V. In comparison with the SBT thin films prepared at 80$0^{\circ}C$ in $O_2$ ambient by furnace annealing process, the SBT thin films prepared at $650^{\circ}C$ in vacuum and oxygen ambient using the RTA process showed a good crystallization and electrical properties which would be able to apply to the virtul device fabrication precess.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.05b
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• pp.8-11
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• 2001

In this study. the recovery of plasma induced damage in the etched PZT thin film with $O_2$ re-annealing have been investigated. The PZT thin films were etched as a function of $Cl_2/Ar$ and additive $CF_4$ into $Cl_{2}(80%)/Ar(20)%$. The etch rates of PZT thin films were $1600\dot{A}/min$ at $Cl_{2}(80%)/Ar(20)%$ gas mixing ratio and $1970\dot{A}/min$ at 30 % additive $CF_4$ into $Cl_{2}(80%)/Ar(20)%$. The etched profile of PZT films was obtained above 70 by SEM. In order to recovery properties of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures in $O_2$ atmosphere. From the hysteresis curves, ferroelectrical properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed sample is consistent with the increase of the (100) and (200) PZT phase revealed by x-ray diffraction (XRD). From XPS analysis, intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of TixOy is recovered by $O_2$ recombination during rapid thermal annealing process. From AFM images, it shows that the surface roughness of re-annealed sample after etching is improved.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.134-134
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• 2011

High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.637-638
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• 2005

AAO templates were fabricated using a two-step anodization process with pretreatment such as electro polishing and annealing. To reduce process time and get well-aligned pore array, rapid thermal processor by an halogen lamp was employed in vacuum state at $500^{\circ}C$ for various time. The pore array of AAO template annealed at $500^{\circ}C$ for 2 h is comparable to a template annealed in conventional furnace at $500^{\circ}C$ for 30 h. The well-fabricated AAO template has the mean pore diameter of 70 nm, the barrierlayer thickness of 25 nm, and the pore depth of $9{\mu}m$. And the pore density can be as high as $2.0\times10^{10}cm^{-2}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.237-238
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• 2008

Electrical properties of Pd/Zn/Pd/Au contacts to p-InP were investigated as function of the V/III ratio of p-InP. P-type InP was made by the Zn diffusion into InP and activation process with rapid thermal annealing (RTA) measurement. After activation, the hole concentration was two orders of magnitude higher than that of the sample having only diffusion process. According to transmission line method (TLM) results, the specific contact resistance of p-InP was lower as used InP having the lower V/III ratio. The experimental results represent that the diffusion of Zn in undoped InP deeply related to the equilibrium between interstitials and substitutional Zn is established via indium interstitials.

• Transactions on Electrical and Electronic Materials
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• v.6 no.2
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• pp.51-56
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• 2005

Ferroelectric Bi$_{3.35}$Sm$_{0.65}$Ti$_{3}$O$_{12}$(BSmT) thin films were synthesized using a sol-gel process. Bi(TMHD)$_{3}$, Sm$_{5}$(O$^{i}$Pr)13, Ti(O$^{i}$Pr)4 were used as the precursors, which were dissolved in 2­methoxyethanol. The BSmT thin films were deposited on Pt/TiO$_{x}$/SiO$_{2}$/Si substrates by spin­coating. The electrical properties of the thin films were enhanced using rapid thermal annealing process (RTA) at 600 $^{circ}$C for 1 min in O$_{2}$. Thereafter, the thin films were annealed from 600 to 720 $^{circ}$C in oxygen ambient for 1 hr, which was followed by post-annealed for 1 hr after depositing a Pt electrode to enhance the electrical properties. X-ray diffraction (XRD) and scanning electron microscopy (SEM) were used to analyze the crystallinity and surface morphology of layered perovskite phase, respectively. The remanent polarization value of the BSmT thin films annealed at 720 $^{circ}$C after the RTA treatment was 35.31 $\mu$C/cmz at an applied voltage of 5 V.

• Journal of the Korean Ceramic Society
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• v.37 no.8
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• pp.731-738
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• 2000

KLN(K3Li2Nb5O15) has attracted a great deal of attention for their potential usefulness in piezoelectric, electro-optic, nonlinear optic, and pyroelectirc devices. Especially, the KLN single crystal has been studied in the field of optics and electronics. However it is hard to produce good quality single crystals due to the crack propagation during crystal growing. One of the solutions of this problem is prepartion of thin film. But the intensive study has not been conducted so far. In this study, after the KLN thin film were prepared by R.F. magnetron Sputtering method on SiO2/Si substrate, the post-annealing methods of RTA(rapid thermal annealin) and IPA(insitu post annealing) were employed. The deposition condition of KLN thin film was RF power(100 W), Working pressure(100 mtorr). The commonness of both RAT and IPA was that the higher were deposition and post annealing temperature, the higher was the intensity of XRD but the less surface roughness. The difference of post-annealing methods affected XRD phase and surface condition very much. And in IPA process, the influence of O2 had much effect on the formation of KLN phase.