• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.27 no.8
• /
• pp.491-496
• /
• 2014

The resistive switching characteristics of resistive random access memory (ReRAM) based on amorphous $Ge_{0.5}Se_{0.5}$ thin films have been demonstrated by using Ti/Ag nanocrystals/$Ge_{0.5}Se_{0.5}$/Pt structure. Ag nanocrystals (Ag NCs) were spread on the amorphous $Ge_{0.5}Se_{0.5}$ thin film and they played the role of metal ions source. As a result, comparing the conventional Ag/$Ge_{0.5}Se_{0.5}$/Pt structure, this Ti/Ag NCs/$Ge_{0.5}Se_{0.5}$/Pt ReRAM device exhibits the highly uniform bipolar resistive switching (BRS) characteristics, such as the operating voltages, and the resistance values. At the same time, a stable DC endurance(> 100 cycles), and the excellent data retention (> $10^4$ sec) properties were found from the Ti/Ag NCs/$Ge_{0.5}Se_{0.5}$/Pt structured ReRAM device.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.242.1-242.1
• /
• 2013

최근, 저항변화 메모리 (resistance random access memory, ReRAM)는 단순한 구조, 고집적성, 낮은 소비 전력, 우수한 retention 특성 CMOS 기술과의 공정호환성 등의 장점으로 인하여 현재 사용되는 메모리의 물리적 한계를 극복할 수 있는 차세대 메모리로써 주목을 받고 있다. 더욱이 용액공정은 높은 균일성, 공정 시간 및 비율 감소 그리고 대면적화가 가능한 장점을 가진 이유로 TiOx, ZrOx ZnO 같은 high-k 물질들을 이용한 연구가 보고되고 있다. 기존의 ReRAM 용액공정에서 결함, 즉 oxygen vacancies 그리고 불순물들을 제어하기 위해 일반적으로 사용되는 furnace 열처리는 낮은 열효율과 고비용등의 문제점을 가지고 있다. 특히 glass 또는 flexble 기판의 경우 열처리 온도에 제약이 있다. 이러한 문제를 해결하기 위한 방법으로 열 균일성, 짧은 공정시간 의 장점을 가진 microwave 열처리 방법이 보고되고 있다. 따라서 본 연구에서는 용액공정을 이용하여 증착한 HfOx 기반의 저항변화 메모리를 제작하여 저온에서 microwave 열처리 와 furnace 열처리의 특성을 비교평가 하였다. 그 결과 microwave 열처리 방법이 furnace 열처리 방법보다 넓은 메모리 마진, 향상된 uniformity 를 가지는 것을 확인 하였다. 이로써 저온공정이 필요한 ReRAM 의 열처리 대안책 으로 사용될 수 있을 것으로 기대된다.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.285-285
• /
• 2016

Resistive random access memory devices have been widely studied due to their high performance characteristics, such as high scalability, fast switching, and low power consumption. However, fluctuation in operational parameters remains a critical weakness that leads to device failures. Although the random formation and rupture of conducting filaments (CFs) in an oxide matrix during resistive switching processes have been proposed as the origin of such fluctuations, direct observations of the formation and rupture of CFs at the device scale during resistive switching processes have been limited by the lack of real-time large-area imaging methods. Here, a novel imaging method is proposed for monitoring CF formation and rupture across the whole area of a memory cell during resistive switching. A hybrid structure consisting of a resistive random access memory and a light-emitting diode enables real-time monitoring of CF configuration during various resistive switching processes including forming, semi-forming, stable/unstable set/reset switching, and repetitive set switching over 50 cycles.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.02a
• /
• pp.607-607
• /
• 2013

차세대 비휘발성 메모리 소자로서 각광받고 있는 저항 변화 메모리(resistive switching random access memory; ReRAM) 소자는 속도가 빠르고, 에너지 소모가 적으며, 고집적화를 이루기 용이하다는 강점을 보유하고 있다. 지금까지 저항변화 물질의 최적화를 위해 매우 다양한 물질들이 연구되고 있으며, 그 물질에 따라 스위칭 메커니즘 및 동작 방법이 다르게 보고되어 왔다. 하지만 저항변화 메모리의 스위칭 거동은 전형적인 전기적 제어 조건으로부터 구현되었기 때문에 한정된 소자 특성을 나타낼 수밖에 없었다. 본 연구에서는 새로운 메모리 제어 조건으로 빛을 이용함으로써 한정된 소자 특성으로부터 벗어나고자 하였다. 저항 변화 물질로 잘 알려진 ZnO를 표면적이 넓은 형태로 합성하기 위하여 hydrothermal 방법으로 FTO 기판 위에 수직하게 배열된 ZnO 나노와이어를 형성하고 그 위에 Au 상부 전극을 형성하여 금속-절연체-금속 소자 구조를 제작하였다. 본 연구에서는 전형적인 전기적 제어 조건에 더불어 빛의 입사 유무 조건을 바꿔가면서 Au/ZnO 나노와이어/FTO 소자의 저항 변화 특성을 평가 하였을 뿐만 아니라 전기적 인가 없이 오직 빛만으로 두 가지 안정한 저항 상태를 반복적으로 전환하는 특성을 유도하였다. 본 결과를 바탕으로 필라멘트 이론에 기초한 저항 변화 메커니즘을 설명하는 모델이 제시되었다.

• Proceedings of the KIEE Conference
• /
• 2006.10a
• /
• pp.103-104
• /
• 2006

$Pb(Zr,Ti)O_3(PZT)$ is very attractive ferroelectric materials for ferroelectric random access memory (FeRAM) applications because of its high polarization ability and low process temperature. However, Chemical Mechanical Polishing (CMP) pressure and velocity must be carefully adjusted because FeRAM shrinks to high density devices. The contaminations such as slurry residues due to the absence of the exclusive cleaning chemicals are enough to influence on the degradation of PZT thin film capacitors. The surface characteristics of PZT thin film were investigated by the change of process parameters and the cleaning process. Both the low CMP pressure and the cleaning process must be employed, even if the removal rate and the yield were decreased, to reduce the fatigue of PZT thin film capacitors fabricated by damascene process. Like this, fatigue characteristics were partially controlled by the regulation of the CMP process parameters in PZT damascene process. And the exclusive cleaning chemicals for PZT thin films were developed in this work.

• Proceedings of the KIEE Conference
• /
• 2001.07d
• /
• pp.2299-2301
• /
• 2001

광 디스크의 용량을 증가시기키 위해선, 레이저 다이오드의 단파장화와 렌즈의 개구수 증가가 수년 동안 시도되어왔다. 불행히도 이러한 노력들은 디스크 틸트(tilt)로 인해 야기되는 코마(coma) 수차로 인한 부작용을 유발하였다. 이런 문제를 해결하기 위해, 램(random access memory, RAM) 디스크의 경우 몇 가지 검출과 보상 방법이 제안되었다. 그러나, 롬(read only memory, ROM) 디스크의 경우 아직까지 뚜렷한 해결책이 제시되지 않고 있다. 본 논문에서는 8분할 광 검출기에 의해 생성되는 차동 위상 검출(differential phase detection, DPD) 신호를 이용한 고밀도 롬 디스크에서 래디얼(radial) 틸트를 검출하는 방법을 제안한다. 3축 렌즈 구동형 액츄에이터(actuator)를 이용하여 개발한 래디얼 틸트 서보로 검출된 래디얼 틸트를 보상한다. 액츄에이터의 회전이 트래킹(tracking) 서보(servo)에 미치는 영향을 소개한다. 끝으로 제안된 방법의 유용성을 고밀도 롬 드라이브에 대한 실험을 통해 검증한다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.154-155
• /
• 2007

PRAM(Phase-Change RAM) is a promising memory that can solve the problem of conventional memory and has the nearly ideal memory characteristics. We reviewed the issues for high density PRAM integration. Writing current reduction is the most urgent problem for high density PRAM realization. So, we studied new constitution of $Ge_1Se_1Te_2$ chalcogenide material and presented the method of reducing the contact size between $Ge_1Se_1Te_2$ and electrode. A small-contact-area electrode is used primarily to supply current into and minimize heat loss from the chalcogenide. In this letter, we expect the method of reducing the contact size between $Ge_1Se_1Te_2$ and electrode to decrease writing current.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.11 no.3
• /
• pp.146-152
• /
• 2011

Thermal stability of $Ge_2Sb_2Te_5$ (GST) and $SiO_2$ doped GST (SGST) films for phase change random access memory applications was investigated by observing the change of surface roughness, layer density and composition of both films after isothermal annealing. After both GST and SGST films were annealed at $325^{\circ}C$ for 20 min, root mean square (RMS) surface roughness of GST was increased from 1.9 to 35.9 nm but that of SGST was almost unchanged. Layer density of GST also steeply decreased from 72.48 to 68.98 $g/cm^2$ and composition was largely varied from Ge : Sb : Te = 22.3 : 22.1 : 55.6 to 24.2 : 22.7 : 53.1, while those of SGST were almost unchanged. It was confirmed that the addition of a small amount of $SiO_2$ into GST film restricted the deterioration of physical and chemical properties of GST film, resulting in the better thermal stability after isothermal annealing.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.55 no.3
• /
• pp.111-115
• /
• 2006

We investigated accelerated soft error rate(ASER) in 8M static random access memory(SRAM) cells. The effects on ASER by well structure, operational voltage, and cell transistor threshold voltage are examined. The ASER decreased exponentially with respect to operational voltage. The chips with buried nwell1 layer showed lower ASER than those either with normal well structure or with buried nwell1 + buried pwell structure. The ASER decreased as the ion implantation energy onto buried nwell1 changed from 1.5 MeV to 1.0 MeV. The lower viscosity of the capping layer also revealed lower ASER value. The decrease in the threshold voltage of driver or load transistor in SRAM cells caused the increase in the transistor on-current, resulting in lower ASER value. We confirmed that in order to obtain low ASER SRAM cells, it is necessary to also the buried nwell1 structure scheme and to fabricate the cell transistors with low threshold voltage and high on-current.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.2 no.3
• /
• pp.205-212
• /
• 2002

The growth characteristics of metal-organic chemical vapor deposition (MOCVD) $Pb(Zr_xTi_{1-x})O_3 (PZT) thin films were investigated for the application of high-density ferroelectric random access memories (FRAM) devices beyond 64Mbit density. The supply control of Pb precursor plays the most critical role in order to achieve a reliable process for PZT thin film deposition. We have monitored the changes in the microstructure and electrical properties of films on increasing the Pb precursor supply into the reaction chamber. Under optimized conditions, $Ir/IrO_2/PZT(100nm)/Ir capacitor shows well-saturated hysteresis loops with a remanent polarization (Pr) of $~28{\mu}C/textrm{cm}^2$ and coercive voltage of 0.8V at 2.5V. Other issues such as step coverage, compositional uniformity and low temperature deposition was discussed in viewpoint of actual device application.