• Journal of Advanced Marine Engineering and Technology
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• v.30 no.8
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• pp.901-906
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• 2006

In this paper, the power amplifier using active bias circuits for LDMOS(Lateral Diffused Metal Oxide Semiconductor) MRF-21180 is designed and fabricated. According to change the temperature, the gate voltage of LDMOS is controlled by the fabricated active bias circuits which is made of PNP transistor to suppress drain current. The driving amplifier using MRF-21125 and MRF-21060 is made to drive the LDMOS MRF-21180 power amplifier. The variation of current consumption in the fabricated 60 watt power amplifier has an excellent characteristics of less than 0.1 A, whereas a passive biasing circuit dissipates more than 0.5 A. The implemented power amplifier has the gain over 9 dB, the gain flatness of less than $\pm$0.1 dB and input and output return loss of less than -6 dB over the frequency range 2.11 $\sim$ 2.17 GHz. The DC operation point of this power amplifier at temperature variation 0 $^{\circ}C$ to 60 $^{\circ}C$ is fixed by active bias circuit.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1091-1097
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• 2013

This paper presents a rectifier with comparator using unbalanced body biasing in $0.11{\mu}m$ RF CMOS process. It is composed of MOSFETs and two comparators. The comparator is used to reduce reverse leakage current which occurs when the load voltage is higher than input voltage. For the comparator, unbalanced body biasing is devised. By using unbalanced body biasing, reference voltage for comparator changing from high state to low state is increased, and it reduces time interval for leakage current to flow. 13.56 MHz 2 Vpp signal is used for input and $1k{\Omega}$ resistor and 1 nF capacitor are used for output load for simulation and experimental environment. In simulation environment, voltage conversion efficiency(VCE) is 87.5 % and Power conversion efficiency(PCE) is 50 %. When the rectifier is measured, VCE shows 90.203 % and PCE shows 45 %.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.9
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• pp.2298-2306
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• 2014

In this paper, we propose an open loop power control algorithm to control transmission power of the On-The-Move(OTM) Satcom terminal in GEO satellite communication environment. The proposed algorithm identifies the current channel state restricted by an obstacle or an antenna depointing loss based on the received beacon signal strength. On the basis of the determined signal attenuation causes, the OTM Satcom terminal turns off the RF output when an antenna tracking is failed. If the OTM Satcom terminal experiences a channel blockage by an obstacle, the terminal spreads the transmit data to increase data reception probability. To evaluate the performance of the proposed algorithm, we compare an adjacent satellite interference level and an outage probability. The results show the performance of the proposed algorithm is better than that of the conventional algorithm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.8 s.99
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• pp.777-782
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• 2005

In this paper, adaptive bias circuit and PBG structure have been employed to suppress IMD(Inter-Modulation Distortion) and improve PAE(Power Added Efficiency) of the Doherty amplifier. Gate bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed power amplifier using adaptive bias circuit and PBG has been improved the $IMD_3$ by 7.5 dBc, and the average PAR by $12\%$, respectively.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.5
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• pp.1-10
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• 1998

A GaAs MMIC composed of VCO (voltage controlled oscillator) and mixer for PCS receiver has been developed using 1.mu.m ion implanted GaAs MESFET process. The VCO consists of a colpitts-type oscillator with a dielectric resonator and the circuit configuration of the mixer is a dual-gate type with an asymmetric combination of LO and RF FETs for the improvement of intermodulation characteristics. The common-source self-biasing is used in all circuits including a buffer amplifier and mixer, achieving a single power supply (3V) operation. The total power dissipation is 78mW. The VCO chip shows a phase noise of-99 dBc/Hz at 100KHz offset. The combined VCO/mixer chip shows a flat conversion gain of 2dB, the frequency-tuning factor of 80MHz/volts in the varacter bias ranging from 0.5V to 0.5V , and output IP3 of dBm at varactor bias of 0V. The fabricated chip size is 2.5mm X 1.4mm.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.74-77
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• 2002

The channel of the superconducting Flux Flow Transistor has been fabricated with plasma etching method using ICP. The ICP conditions were 700 W of ICP power, 150 W of rf chuck power, 5 mTorr of the pressure in chamber and 1:1 of Ar : Cl$_2$, respectively. The channel etched by plasma gas showed superconducting characteristics of over 77 K and superior surface morphology. The critical current of SFFT was altered by varying the external applied current. As the external applied current increased from 0 to 12 mA, the critical current decreased from 28 to 22 mA. Then the obtained r$\sub$m/ values were smaller than 0.1Ω at a bias current of 40 mA. The current gain was about 0.5. Output resistance was below 0.2 Ω.

• Proceedings of the KIEE Conference
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• 2003.07c
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• pp.1955-1957
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• 2003

This paper presents a novel defected ground structure (DGS) and its application to a microwave oscillator. The presented oscillator is designed so as to use the suggested defected ground structure as a feedback loop inducing a negative resistance as well as a frequency-selective circuit. Applying the feedback loop between the drain and the gate of a FET device produces precise phase conversion in the feedback loop. The equivalent circuit parameters of the DGS are extracted by using a three-dimensional EM calculations and simple circuit analysis method. The implemented 1.07 GHz oscillator exhibits 0 dBm output power with over 15% dc-to-RF power efficiency and -106 dBc/Hz phase noise at 100 kHz offset from carrier.

• Journal of Korea Society of Digital Industry and Information Management
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• v.17 no.3
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• pp.9-15
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• 2021

In this paper, the Embedded MEMS system to the power apparatus used Edge Impulse machine learning tools and therefore an improved predictive system design is implemented. The proposed MEMS embedded system is developed based on nRF52840 system and the sensor with 3-Axis Digital Magnetometer, I2C interface and magnetic measurable range ±120 uT, BM1422AGMV which incorporates magneto impedance elements to detect magnetic field and the ARM M4 32-bit processor controller circuit in a small package. The MEMS embedded platform is consisted with Edge Impulse Machine Learning and system driver implementation between hardware and software drivers using SensorQ which is special queue including user application temporary sensor data. In this paper by experimenting, TensorFlow machine learning training output is applied to the power apparatus for analyzing the status such as "Normal, Warning, Hazard" and predicting the performance at level of 99.6% accuracy and 0.01 loss.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.8
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• pp.805-808
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• 2011

This paper presents a design of high-efficiency and high-power class E power transmitter. The transmitter is composed of 300 Watt class E power amplifier and AC-DC converter. The AC-DC converter converts 220 V and 60 Hz AC to a 290 V DC. The generated DC voltage is directly applied to a bias of the class E power amplifier. Because the converter does not have DC-DC converter unit, it has very high conversion efficiency of about 98.03 %. To minimize the loss at the output of the power amplifier, high-Q inductor was implemented and deployed to the output resonant circuit. As a result, the 13.56 MHz class E power amplifier has a high power-added efficiency of 84.2 % at the peak output power of 323.6 W. The overall efficiency of class E power transmitter, including the AC-DC converter, is as high as 82.87 %.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.1009-1012
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• 2000

In this paper, we have designed and fabricated power PHEMT’s with an unit gate width of 80$\mu\textrm{m}$ and 4 fingers, and MIMIC power amplifiers using the PHEMT’s as well. The PHEMT’s have a 0.2$\mu\textrm{m}$ gate length and source to drain spacing of 3$\mu\textrm{m}$. The characteristics of the fabricated PHEMT’s are 4.08dB of S$\sub$21/ gain at the 35GHz and 317mS/mm of gm, and 62GHz of f$\sub$T/ and 120GHz of f$\sub$max/. The designed and fabricated MIMIC’s power amplifiers with 6 PHEMT’s and MIN capacitors were fully passivated by 1000 Α of Si$_3$N$_4$ film for higher performance and surface protects. The chips were processed using the MINT processes, and size was 3.25 ${\times}$ 1.8$\textrm{mm}^2$. The fabricated MIMIC power amplifiers have RF characteristics such as 11.25dB of S$\sub$21/ gain, 11.37dB of input return-loss and 12.69dB of output return-loss at the 34.55GHz.