• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.2
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• pp.77-85
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• 2014

Recently, utilization of MIMO(Multi-Input Multi-Output) system using array antennas is evaluated significantly according to the extension of high-capacity and high-speed communication services. However, MIMO system has disadvantages such as high-complexity and high-power-consumption, because RF(Radio Frequency) chain is required as antenna number, and several array antenna is used in conventional MIMO system. In order to solve these problems, research about beamspace MIMO system using ESPAR(Electronically Steerable Parasitic Array Radiator) antenna that has single RF chain by using one active antenna and several parasitic elements has been studied actively. Beamspace MIMO system using ESPAR antenna is possible to solve the problems of conventional MIMO system, because this system is composed by single RF chain. In this paper, in order to improve the system security, chaos communication algorithm that has characteristics such as non-periodic, non-predictability, easy implementation and initial condition is applied to QPSK (Quadrature Phase Shift Keying) modulated beamspace MIMO system. We design the chaos QPSK modulated beamspace MIMO system, and evaluate SER performance of this system.

• The Journal of the Korea Contents Association
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• v.7 no.11
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• pp.102-110
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• 2007

In this paper, a portable RFID reader which operated in 900MHz UHF band is designed and fabricated and the characteristics of the manufactured portable RFID reader is analyzed through measurement. Analysis of measurements results is achieved based on EPC Class 0 standards that proposed by EPC Global. The proposed RFID reader communicate with tags about 11kbps speed, and have 20 dBm for its maximum RF output power. The proposed portable RFID reader can recognize maximum 68 tags per second, and when reader's output power is 20 dBms, maximum recognition distance is 30cm. And the total size of implemented RFID reader is $71mm{\times}55mm$, that is the maximum 90%, minimum 14% reduced size compared with marketed product.

• ETRI Journal
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• v.30 no.4
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• pp.526-534
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• 2008

This paper presents a fully integrated 0.13 ${\mu}m$ CMOS MB-OFDM UWB transmitter chain (mode 1). The proposed transmitter consists of a low-pass filter, a variable gain amplifier, a voltage-to-current converter, an I/Q up-mixer, a differential-to-single-ended converter, a driver amplifier, and a transmit/receive (T/R) switch. The proposed T/R switch shows an insertion loss of less than 1.5 dB and a Tx/Rx port isolation of more than 27 dB over a 3 GHz to 5 GHz frequency range. All RF/analog circuits have been designed to achieve high linearity and wide bandwidth. The proposed transmitter is implemented using IBM 0.13 ${\mu}m$ CMOS technology. The fabricated transmitter shows a -3 dB bandwidth of 550 MHz at each sub-band center frequency with gain flatness less than 1.5 dB. It also shows a power gain of 0.5 dB, a maximum output power level of 0 dBm, and output IP3 of +9.3 dBm. It consumes a total of 54 mA from a 1.5 V supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.6
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• pp.540-547
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• 2004

In this paper, a current - mode class D(CMCD) power amplifier over 70 % power added efficiency at 900 ㎒ is designed and implemented. Based on push-pull class B structure, main power loss due to charge and discharge of output capacitance in switching mode power amplifier is minimized by applying a parallel harmonic control circuit. Experimental CMCD amplifier with 73 % power added efficiency at 3.2 W and 72 % power added efficiency at 5 W are achieved respectively. In addition a characteristic of switching mode power amplifier whose output power is proportional to magnitude of U power is verified.

• Journal of the Korean Society for Precision Engineering
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• v.19 no.4
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• pp.195-201
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• 2002

We propose a new scheme of high-resolution heterodyne interferometer that employs the two-axial mode He-Ne laser with an inter-mode beat frequency of 600~1000 MHz. An electronic RF-heterodyne circuit lowers the beat frequency down to 5 MHz, so that the phase change of the interferometer output is precisely measured with a displacement resolution of 0.1 nanometer without significant loss of dynamic bandwidth. A thermal control scheme is adopted to stabilize the cavity length with ainus to suppress frequency drifts caused by the phenomena of frequency pulling and polarization anisotropy of the two-axial made laser to a stability level of 2 parts in $10^9$. The two-axial mode HeNe laser yields a high output power of 2.0 mW, which allows us to perform multiple measurements of up to 10 machine axes simultaneously.

• ETRI Journal
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• v.27 no.6
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• pp.685-690
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• 2005

DC and RF characteristics of $0.15{\mu}m$ GaAs power metamorphic high electron mobility transistors (MHEMT) have been investigated. The $0.15{\mu}m{\times}100{\mu}m$ MHEMT device shows a drain saturation current of 480 mA/mm, an extrinsic transconductance of 830 mS/mm, and a threshold voltage of -0.65 V. Uniformities of the threshold voltage and the maximum extrinsic transconductance across a 4-inch wafer were 8.3% and 5.1%, respectively. The obtained cut-off frequency and maximum frequency of oscillation are 141 GHz and 243 GHz, respectively. The $8{\times}50{\mu}m$ MHEMT device shows 33.2% power-added efficiency, an 18.1 dB power gain, and a 28.2 mW output power. A very low minimum noise figure of 0.79 dB and an associated gain of 10.56 dB at 26 GHz are obtained for the power MHEMT with an indium content of 53% in the InGaAs channel. This excellent noise characteristic is attributed to the drastic reduction of gate resistance by the T-shaped gate with a wide head and improved device performance. This power MHEMT technology can be used toward 77 GHz band applications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.1
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• pp.117-122
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• 2016

In this paper, we propose 24-GHz CMOS radio frequency (RF) power amplifier for short-range automotive collision avoidance radars. This circuit contains common source stage with inter-stages conjugate matching circuit as a class-A mode amplifier. The proposed circuit is designed using TSMC $0.13-{\mu}m$ mixed signal/RF CMOS process ($f_T/f_{MAX}=120/140GHz$). It operates at the supply voltage of 2V, and it is designed to have high power gain, low insertion loss and low noise figure in the low supply voltage. To reduce total chip area, the circuit used transmission lines instead of the bulky real inductor. The designed CMOS power amplifier showed the smallest chip size of $0.1mm^2$, the lowest power consumption of 40mW, the highest power gain of 26.5dB, the highest saturated output power of 19.2dBm and the highest maximum power-added efficiency of 17.2% as compared to recently reported results.

• Journal of electromagnetic engineering and science
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• v.2 no.1
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• pp.5-10
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• 2002

We have analized the inverse class-F and class-F amplifiers using their waveforms. From the analytic equations derived from the analysis, we have calculated tole efficiencies, output powers, DC power dissipations, and optimum fundamental load impedances of the inverse class-F and class-F amplifiers. We also have compared them for various operation conditions, which include the same peak current, saute DC power dissipation, same fundamental RF output power, and same fundamental load impedance with different Ron(on-resistance). These analyses have clearly shown the performance limitations, advantages, and guide to the optimized design of the inverse class-F amplifiers.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.9
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• pp.44-50
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• 2002

Recently, a envelope tracking(ET) amplifier that improves efficiency by changing of the bias according to the RF input level is presented to use for a high power amplifier of cellular radio handset using CDMA. The input and the output impedances of the ET amplifier may be varied by changing of the bias of the amplifier, and it makes the amplifier having low gain, low efficiency, and high input and output VSWR. In order to improve the input and the output mismatch of the amplifier, in this paper, two types of ET amplifier are suggested. In case of an ET amplifier using varactor diode, in experimentation, gain is improved about 7dB and the power consumption of the amplifier is better about 60% than that of the conventional amplifier. In case of a base voltage controlled ET amplifier, the gain and power consumption of the amplifier is improved about 9dB and 40% than those of the conventional amplifier, respectively.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1297-1300
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• 2008

A conventional linear accelerator system requires a flat-topped pulse with less than ${\pm}$ 0.5% ripple to meet the beam energy spread requirements and to improve pulse efficiency of RF systems. A pulse transformer is one of main determinants on the output pulse voltage shape. The pulse transformer was investigated and analyzed with the pulse response characteristics using a simplified equivalent circuit model. The damping factor ${\sigma}$ must be >0.86 to limit the overshoot to less than 0.5% during the flat-top phase. The low leakage inductance and distributed capacitance are often limiting factors to obtain a fast rise time. These parameters are largely controlled by the physical geometry and winding configuration of the transformer. A rise time can be improved by reducing the number of turns, but it produces larger pulse droop and requires a larger core size. By tradeoffs among these parameters, the high-voltage pulse transformer with a pulse width of 10 ${\mu}s$, a rise time of 0.84 ${\mu}s$, and a pulse droop of 2.9% has been designed and fabricated to drive a klystron which has an output voltage of 284 kV, 30-MW peak and 60-kW average RF output power. This paper describes design optimization of a high-voltage pulse transformer for high-power pulsed applications. The experimental results were analyzed and compared with the design. The design and optimal tuning parameter of the system was identified using the model simulation.