• 한국전기전자재료학회논문지
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• 제13권10호
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• pp.840-846
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• 2000

In this work, small-size, high-performance solenoid-type RF chip inductors utilizing a low-loss Al$_2$O$_3$core material were investigated. The size of the chip inductors fabricated in this work were 15$\times$10$\times$0.7㎣, 2.1$\times$1.5$\times$10㎣, and 2.4$\times$2.0$\times$1.4㎣ and copper (Cu) wire with 40 ㎛ diameter was used as the coils. High frequency characteristics of the inductance, quality factor, and impedance of developed inductors were measured suing an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). It was observed that the developed inductors with the number of turns of 7 have the inductance of 33 to 100nH and exhibit the self-resonant frequency (SRF) of .26 to 1.1 GHz. The SRF of inductors decreases with increasing the inductance and the inductors have the quality factor of 60 to 80 in the frequency range of 300 MHz to 1.1 GHz. In this study, small-size solenoid-type RF chip inductors with high inductance and high quality factor were fabricated successfully. It is suggested that the thin film-type inductor is necessary to fabricate the smaller size inductors at the expence of inductance and quality factor values.

• Journal of Biosystems Engineering
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• 제28권4호
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• pp.369-376
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• 2003

This study was conducted to develop a precision measurement method of water content in soil (find sand and silty sand) using dual RF impedance changes. The electrically stable perpendicular plate capacitive sensor was fabricated and utilized to sense the water content in soil. Crystal oscillators of 5 and 20 MHz and related circuits were designed to detect the capacitance changes of a perpendicular plate capacitive sensor with soil samples at various volumetric water contents. A multiple regression model for volumetric water content having dual oscillation frequency changes at 5 and 20 MHz as independent variables resulted in coefficient of determination of 0.963 and standard error calibration of 0.030 cm$^3$/cm$^3$ for calibration and coefficient of determination of 0.966, standard error of prediction of 0.027 cm$^3$/cm$^3$ and bias of 0.001 cm$^3$/cm$^3$ for prediction.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.126-126
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• 2009

Noninvasive plasma diagnostic technique is introduced to analyze and characterize HICP (Helmholtz Inductively Coupled Plasma) source during the plasma etching process. The HICP reactor generates plasma mainly through RF source power at 13.56MHz RF power and RF bias power of 12.56MHz is applied to the cathode to independently control ion density and ion energy. For noninvasive sensors, the RF sensor and the OES (Optical emission spectroscopy) were employed since it is possible to obtain both physical and chemical properties of the reactor with plasma etching. The plasma impedance and optical spectra were observed while altering process parameters such as pressure, gas flow, source and bias power during the poly silicon etching process. In this experiment, we have found that data measured from these noninvasive sensors can be correlated to etch results. In this paper, we discuss the relationship between process parameters and the measurement data from RF sensor and OES such as plasma impedance and optical spectra and using these relationships to analyze and characterize H-ICP source.

• 대한전자공학회논문지TC
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• 제42권6호
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• pp.1-8
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• 2005

본 논문에서는 1.8GHz 고주파 수신기 전단부의 결함 검사를 위한 새로운 저가의 BIST 회로(자체내부검사회로) 및 설계기술을 제안한다. 이 기술은 입력 임피던스 매칭 측정 방법을 이용한다. BIST 블록과 고주파 수신기의 전단부는 0.25m CMOS 기술을 이용하여 단일 칩 위에 설계되었다. 이 기술은 측정이 간단하고 비용이 저렴하며, BIST 회로가 차지하는 면적은 고주파 전단부가 차지하는 전체면적의 약 $10\%$에 불과하다.

• 전력전자학회논문지
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• 제24권3호
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• pp.161-168
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• 2019

This study introduces a new topology to decrease the voltage stress experienced by a 13.56 MHz electrical variable capacitor (EVC) circuit with an asymmetrical switch structure applied to the impedance matching circuit of a radio frequency (RF) plasma system. The method adopts a symmetrical switch structure instead of an asymmetrical one in each of the capacitor's leg in the EVC circuit. The proposed topology successfully reduces voltage stress in the EVC circuit due to the symmetrical charging and discharging mode. This topology can also be applied to the impedance matching circuit of a high-power and high-frequency RF etching system. The target features of the proposed circuit topology are investigated via simulation and experiment. Voltage stress on the switch of the EVC circuit is successfully reduced by more than 40%.

• Journal of Advanced Marine Engineering and Technology
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• 제33권4호
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• pp.562-568
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• 2009

In this paper, using the periodic ground structure (PGS), highly miniaturized branch-line coupler and impedance transformer were realized on Si radio frequency integrated circuit (RFIC). The branch-line couple exhibited good RF performance from 41.75 to 50 GHz, and its size was $0.46{\times}0.55mm^2$, which is 37 % of conventional one. The impedance transformer exhibited good RF performance from 1 to 40GHz, and its size was $0.01mm^2$, which is 6.99 % of conventional one.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제51권7호
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• pp.316-321
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• 2002

In this Paper, the channel characteristics of the medium voltage(22.9kV) power line to analysis the broadband power line communication in the frequency range up to 30MHz was measured. With the sideband electrical coupler in the operating frequency range from DC to 30MHz, we measured characteristic impedance, noise and attenuation of the medium voltage power line, and then characteristic impedance was measured at the state of unloaded medium voltage power line by Scattering parameter method of Vector Network Analyzer. As a measurement result, Channel impedance shows 100~380$\Omega$ at the less than 15MHz and 70~230$\Omega$ at the more than 15 MHz. Noise characteristics of power line shows -75dBm at 20MHz and Narrowband interference noise was from 3 MHz to 7MHz.

• 한국전자파학회논문지
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• 제23권11호
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• pp.1228-1238
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• 2012

본 논문에서는 RF 비아 구조를 이용하여 2가지 종류의 K-대역 CMOS FMCW 레이더 칩용 고주파 패키지를 설계, 제작 및 평가하였다. 패키지는 범용 PCB와 LTCC 공정을 이용하여 각각 제작되었다. 24 GHz를 기준으로 설계가 진행되었으며, 3차원 전자기 시뮬레이션을 통해 와이어 본딩과 RF 비아 구조의 임피던스 변화를 확인하였다. 비아 구조는 임피던스 부정합에 의한 손실을 억제하기 위해 $50{\Omega}$의 특성 임피던스를 가지도록 하였다. PCB 기반 패키지와 LTCC 패키지의 설계 검증을 위해 각 패키지의 RF 경로를 back-to-back 연결하여 시험용으로 제작하였고, 측정 결과 24 GHz에서 0.4 dB 이하의 우수한 삽입 손실을 얻었으며, 20~29 GHz 주파수 영역에서 0.5 dB 이하의 삽입 손실을 보였다. 반사 손실의 경우, 전체 주파수 영역에서 PCB 기반 패키지는 -13 dB 이하, LTCC 패키지는 -15 dB 이하의 특성이 측정되었고, back-to-back 연결의 리플 특성이 일반적으로 5 dB 정도의 반사 손실 열화를 초래하므로 패키지 자체의 RF 경로는 약 5 dB 정도 개선될 것으로 예측되었다.

• 전자공학회논문지
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• 제50권4호
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• pp.203-211
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• 2013

태그 안테나를 설계할 때에는 태그 칩이 패드(pad)에 마운트(mount)된 상태에서 구한 칩 임피던스(chip impedance)와 읽기 전력감도(read power sensitivity) 값이 필요하다. 하지만 칩 임피던스 값은 태그 설계와 제조공정에 따라 그 값이 달라지기 때문에 칩 제조회사들이 이 자료를 제공하지 못하고, 단지 참고할 수 있는 근사값을 만을 제고하고 있다. 본 연구는 간단한 보조기구들과 RF 측정장비들을 가지고 마운트된 칩의 임피던스와 읽기 전력감도를 산출할 수 있는 방법을 제시한다. 본 연구는 마운틴된 칩의 단자에서 직접 측정하는 것이 불가능하기 때문에 보조 픽스쳐(fixture)들이 사용되었으며, 보조 픽스쳐에서 발생되는 전기력 특성들은 등가회로 모델과 디임베드(de-embed) 기법을 사용하여 제거함으로써 칩 임피던스와 읽기 전력감도 값을 산출하였다. 값을 알고 있는 커패시터와 저항 칩을 가지고 제안된 디임베드 방법의 타당성과 정확도를 검증하였으며, 상업용 태그 칩을 대상으로 한 심험에서도 제안된 방법의 타당성을 재확인 할 수 있다.

• 산업기술연구
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• 제30권A호
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• pp.69-73
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• 2010

In this paper, we designed the RF-DC converter used in wireless power transmission system and studied how to design the RF-DC converter of high conversion efficiency. The RF-DC converter operate at 2.45GHz and the diode is connected with series. The RF-DC converter uses shorted stub for DC loop and matching. We can divide the RF-DC converter circuit into four blocks. The reflection coefficients between the blocks were optimized for the maximum conversion efficiency at 0 dBm input power and $1300{\Omega}$ load impedance. The final design of the RF-DC converter has a 52 percent conversion efficiency.