• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.7
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• pp.18-27
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• 1997

A CMOS 950 MHz frequency synthesizer is designed and fabricated in a 0.8.mu.m standard CMOS process for IS-95-A CDMA mobile communication transceivers To utilize a CMOS ring VCO in a CDMA wireless communication receisver, we employed a QDC (quasi-direct conversion) receiver architecture for CDMA applications. Realized RF frequency synthesizer used as the RF local oscillator for a QDC receiver exhibits a phase noise of -92 dBc/Hz at 885kHz offset from the 950.4 MHz carrier, which complies with IS-95-A CDMA specification. It has a rms jitter of 23.7 ps, and draws 30mA from a 5V supply. Measured I/Q phase error of the 950.4 output signals is 0.7 degree.

• Journal of Sensor Science and Technology
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• v.14 no.3
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• pp.150-155
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• 2005

We propose a newly developed automobile sensor monitoring system incorporated with a tire pressure monitoring sensor(TPMS). The RF-transmitter based on a tire pressure sensor, sends a frame data about measured tire-pressure to RF receiver. And the various sensing signals based on sensors such as fuel-level sensor, engine oil level sensor and temperature sensors, are converted into 10-bit digital data. The microprocessor displays converting data such as tire pressure, trip distance, fuel quantity, coolant temperature and car-room temperature, on LCD panel. The proposed system can be successfully adapted to monitoring of the tire pressure and various automobile sensors.

• International journal of advanced smart convergence
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• v.10 no.3
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• pp.81-88
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• 2021

This paper proposes two types of subharmonic RF receiver front-end (called LMV) where, in a single stage, quadrature voltage-controlled oscillator (QVCO) is stacked on top of a low noise amplifier. Since the QVCO itself plays the role of the single-balanced subharmonic mixer with the dc current reuse technique by stacking, the proposed topology can remove the RF mixer component in the RF front-end and thus reduce the chip size and the power consumption. Another advantage of the proposed topologies is that many challenges of the direct conversion receiver can be easily evaded with the subharmonic mixing in the QVCO itself. The intermediate frequency signal can be directly extracted at the center taps of the two inductors of the QVCO. Using a 65 nm complementary metal oxide semiconductor (CMOS) technology, the proposed subharmonic RF front-ends are designed. Oscillating at around 2.4 GHz band, the proposed subharmonic LMVs are compared in terms of phase noise, voltage conversion gain and double sideband noise figure. The subharmonic LMVs consume about 330 ㎼ dc power from a 1-V supply.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5A
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• pp.482-489
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• 2010

In this paper we have proposed a new architecture of DQ-IRM(Double-Quadrature Image Rejection Mixer) for image rejection in the low-IF receiver. It consist of a frequency-tunable RF PPF(Poly Phase Filter) and the quadrature mixers. The conventional DQ-IRM generates the quadrature RF signals for the RF wide band at once. But the proposed DQ-IRM with the frequency-tuable RF PPF generates the quadrature RF signals for the narrow band of 2~3 channels bandwidth, which is partitioned from the RF wide band. We designed the CMOS RF tuner for T-DMB(Terrestrial Digital Multimedia Broadcasting) with the proposed 3rd DQ-IRM using a 0.18um CMOS technology and verified the performances of the designed receiver such as the image rejection ratio, the noise figure and the power consumption. The overall NF of the RF tuner is about 1.26 dB and the image reject ratio is about 51 dB. The power consumption is 55.8 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10b
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• pp.1376-1379
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• 1996

In this paper a GPS receiver is developed using commercial chipsets. GP2010 RF front end and GP2021 Multi-channel correlator of GEC PLESSY are adapted in designing the receiver hardware. MC 68340 is used for controlling the correlator GP2021 and implementing the navigation processing. Also presented are some test results of the developed receiver whose software has an interrupt driven structure rather than common real-time kernel based structure.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.11
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• pp.66-75
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• 1997

We derive the system design parameters to implement the receiving system for the PCS mobile station to satisfy the J-sTD-018 which is the PCS mobile station(MS) minimum performance. Also we analyze the system performance and intermodulation spurious due to the values of a device cause the system performance degradation, is proposed. The simulation shows the receiver's maximum system noise figure to satisfy the receiver selectivity is approximately 11 dB. While the MS noise figure is 10dB with system margin 1 dB, the minimum selectivity is -71 dB at 1.25MHz frequency offset from the carrier frequency. And the input 3rd order intercept point of the MS class I and the MS class II~V is -9.5 dBm and -14dBm respectively. When the interference power level at the receiver is small, the receiver has better performance as we increase the gain of the LNA. However, when the interference level at the receiver is large, the receiver performance is heavily affected by the spurious as we increase the gain of the LNA. Thus, we proved the effectiveness of the LNA On/Off switching technique as to reduce the effect of the spurious.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.98-104
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• 2013

This paper presents a WBAN UWB receiver circuit for RTLS(real time location system) and wireless data communication. The UWB receiver is designed to OOK modulation for energy detection. The UWB receiver is designed for sub-sampling techniques using 4bit ADC and DLL.The proposed UWB receiver is designed in $0.18{\mu}m$ CMOS and consumes 61mA with a 1.8V supply voltage. The UWB receiver achieves a sensitivity of -85.7 dBm, a RF front-end gain of 42.1 dB, a noise figure of 3.88 dB and maximum sensing range of 4 meter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.1
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• pp.36-42
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• 2014

In this paper, we propose receiver using ESPAR antenna for diversity gain. The proposed receiver receive signal by changing direction of beam pattern alternately in the OFDM symbol time period when DoA is estimated. In this way, the proposed receiver obtains diversity gain. The proposed receiver has single RF chain. If beam direction is changed alternately then it causes spectrum spread. And then, ICI occur because of spectrum spread. This interference can be equalized at the frequency domain equalizer such as ZF, MMSE and ML. In simulation, the proposed system receive signal using beam pattern of $60^{\circ}$ and beam pattern of $120^{\circ}$ alternately in OFDM symbol time period when it is assumed that DoA is $60^{\circ}$ and $120^{\circ}$. The performance results confirm that it is possible that the proposed receiver obtains diversity gain.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.7
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• pp.791-796
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• 2012

A RF limiter is a component to protect the receiver front end from undesired signal. A RF limiter is a key component whose output is constant level for all inputs above a critical value. A RF limiter use a diode to pass signals of low power while attenuating those above some threshold. A RF limiter for receiver protection in modern radar systems is playing a vital role in order to meet challenges of new interference threats and complicated electromagnetic environments. This paper proposed a new circuit for high power RF limiter whose structure is the combination of the PIN diode and Limit diode. PIN diode take a use of its isolation characteristics which act as a switch does. A 2 kW RF limiter with 200 us pulse width at S-band was developed. It shows good agreements between estimated value and measured results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.91-99
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• 2018

This paper has proposed a low-noise and high-linear RF receiver supporting TV white space from 470 MHz to 698 MHz), which is implemented in $0.13-{\mu}m$ CMOS technology. It consists of a low-noise amplifier, a RF band-pass filter, a RF amplifier, a passive down-conversion mixer, and a channel-selection low-pass filter. A low-noise amplifier and RF amplifier provide a high voltage gain to improve the sensitivity level. To suppress strong and nearby interferers, two RF filtering schemes have been performed by using a RF BPF and a down-conversion mixer. The proposed LPF has been based on the common-gate topology and adopted a bi-quad cell to achieve -24dB/oct characteristics. In addition, the RF receiver can support the overall TV band by controlling a LO frequency. The simulated results show a voltage gain of 56 dB, a noise figure of less than 2 dB, and an out-of-channel IIP3 of -2.3 dBm. It consumes 37 mA from a 1.5 V supply voltage.