• Title/Summary/Keyword: RF Receiver

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A Design of Low Frequency Noise Figure Improvement of RF Circuit for Direct Conversion Receiver (직접 변환 방식의 저주파 잡음 특성 개선을 위한 RF 전치부 설계 연구)

  • Choi, Hyuk-Jae;Choi, Jin-Kyu;Kim, Tae-Seong;Park, Do-Hyeon;Kim, Hyeong-Seok
    • 한국정보통신설비학회:학술대회논문집
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    • 2009.08a
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    • pp.305-308
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    • 2009
  • This paper presents the design and analysis of RF Front End for Wireless Heartbeat measurement System. In this work LNA, an inductor connected at the gate of the cascode transistor and capacitive cross-coupling are strategically combined to reduce the noise and the nonlinearity influences of the cascode transistors in a differential LNA. The Mixer is implemented by using the Gilbert-type configuration, cross pmos injection technique and the resonating technique for the tail capacitance. The resulting LNA achieves 1.26 dB NF, better than 1.88dB NF Typical Also Mixer resulting achieves 9.8dB at 100KHz.

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Sensing Optimization for an Receiver Structure in Cognitive Radio Systems

  • Kang, Bub-Joo;Nam, Yoon-Seok
    • Journal of information and communication convergence engineering
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    • v.9 no.1
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    • pp.27-31
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    • 2011
  • This paper describes the optimization of spectrum sensing in terms of the throughput of a cognitive radio (CR) system. Dealing with the optimization problem of spectrum sensing, this paper evaluates the throughput of a CR system by considering such situations as the penalty time of a channel search and incumbent user (IU) detection delay caused by a missed detection of an incumbent signal. Also, this paper suggests a serial channel search scheme as the search method for a vacant channel, and derives its mean channel search time by considering the penalty time due to the false alarm of a vacant channel search. The numerical results suggest the optimum sensing time of the channel search process using the derived mean channel search time of a serial channel search in the case of a sensing hardware structure with single radio frequency (RF) path. It also demonstrates that the average throughput is improved by two separate RF paths in spite of the hardware complexity of an RF receiver.

A Study on the 300MHz NMR Transceiver (300MHz급 NMR Transceiver 설계 및 제작)

  • Park, Yang-Ha;Jin, Seung-Oh;Won, Jin-Im;Huh, Young
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.3210-3212
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    • 2000
  • We designed and manufactured 300MHz NMR RF Transceiver. NMR system is composed of NMR Spectrometer, Superconductive Magnet and Pulse Programmer, GUI. NMR RF Transceiver is composed of transmitter, receiver, frequency synthesizer. T/R switch, main power amp., RF coil. To phase modulation, transmitter is composed of mixer, splitter and combiner et al. To weak signal detection, receiver is composed of pre-amp., filter, mixer et al. Each module is manufactured PCB. And installed NMR system to detect chemical component of specimen. In result, we can get the information of specimen.

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Implementation of Intelligent Measurement System of InterModulation Distorted RF Signals (지능형 누설왜곡전파신호 측정시스템 개발)

  • Kim, Dong-hyeon;Seo, Na-Hyeon;Park, Ki-Won;Rhee, Young-Chul
    • Journal of the Korean Institute of Intelligent Systems
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    • v.27 no.2
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    • pp.144-149
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    • 2017
  • In this paper, we developed an intelligent and wideband RF-receiver module to represent a high dynamic range and good linearity characteristics up to 650MHz-2700MHz frequency band. and implemented an intelligent digital-RF- distorted signal measuring system for the RF distortion (intermodulation) signals. Broadband RF-receive module was designed to represent the optimized linear parameters of the receiver to meet the low noise and wide dynamic range. The designed intelligent digital-distortion(intermodulation) signal measument system measured by applying the 1MHz IF of third intermodulation signal of DUT and Measured data was recorded by program on the PC monitor with GUI interface. By variable up to 650MHz-2700MHz measured data showed up to -127.8dBc to -138dBc of the distortion (intermodulation) signal. And developed intelligent digital- distortion signal measurement system can be used to measure intermodulation distortion signal of wireless system widely.

The Hardware Design for GPS Data Acquisition Circuit (GPS 데이타 수신을 위한 하드웨어 설계)

  • 정영태;김민호;김명돈;홍성일;변건식;정만영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.10
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    • pp.8-17
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    • 1995
  • Recently, in a variety of the application fields, it is interested in GPS receiver as the use of GPS(Global Positioning System) is increased. In this paer, we propose that a type of new receiver of a simple structure as GPS data receiver. This proposed receiver consists of RF stage, local C/A(Coarse/Acquisition) code generator, C/A code correlator, data demodulator and microprocessor controller as a GPS single channel data receiver using the L1 carrier . It is confirmed that the proposed receiver operates well as GPS raw data receiver through experiment.

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A CMOS IR-UWB RFIC for Location Based Systems (위치 기반 시스템을 위한 CMOS IR-UWB RFIC)

  • Lee, Jung Moo;Park, Myung Chul;Eo, Yun Seong
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.12
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    • pp.67-73
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    • 2015
  • This paper presents a fully integrated 3 - 5 GHz IR-UWB(impulse radio ultra-wide band) RFIC for Location based system. The receiver architecture adopts the energy detection method and for high speed sampling, the equivalent time sampling technique using the integrated DLL(delay locked loop) and 4 bit ADC. The digitally synthesized UWB impulse generator with low power consumption is also designed. The designed IR-UWB RFIC is implemented on $0.18{\mu}m$ CMOS technology. The receiver's sensitivity is -85.7 dBm and the current consumption of receiver and transmitter is 32 mA and 25.5 mA respectively at 1.8 V supply.

A Low Power Single-End IR-UWB CMOS Receiver for 3~5 GHz Band Application (3~5 GHz 광대역 저전력 Single-Ended IR-UWB CMOS 수신기)

  • Ha, Min-Cheol;Park, Byung-Jun;Park, Young-Jin;Eo, Yun-Seong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.7
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    • pp.657-663
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    • 2009
  • A fully integrated single ended IR-UWB receiver is implemented using 0.18 ${\mu}m$ CMOS technology. The UWB receiver adopts the non-coherent architecture, which simplifies the RF architecture and reduces power consumption. The receiver consists of single-ended 2-stage LNAs, S2D, envelope detector, VGA, and comparator. The measured results show that sensitivity is -80.8 dBm at 1 Mbps and BER of $10^{-3}$. The receiver uses no external balun and the chip size is only $1.8{\times}0.9$ mm. The consumed current is very low with 13 mA at 1.8 V supply and the energy per bit performance is 23.4 nJ/bit.

KOMPSAT-2에 사용되는 GPS Receiver 성능 시험

  • 조승원;권기호;최종연;윤영수
    • Bulletin of the Korean Space Science Society
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    • 2003.10a
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    • pp.107-107
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    • 2003
  • GPS Receiver는 위성에 위치 정보와 시간 정보등을 제공하고 navigation을 관리하며 이에 관련된 signal을 processing하는 역할을 한다. 2005년에 발사 예정인 KOMPSAT-2 위성에는 Alcatel에서 제작된 Topstar 3000이 사용된다. Topstar 3000은 RF 부분과 digital 처리부분으로 구성된 GPS core부분과 MLD-STD_1553, DC-DC converter, 그리고 Ovened-controlled Oscillator(OCXO)부분으로 구성되는 option module 부분으로 구성되어 있다. 본 논문에서는 GPS Signal Simulator로 KOMPSAT-2의 실제 궤도를 구현해서 Sun-Point Mode와 Earth-Point Mode 등 여러가지 Mode 에서 GPS Receiver의 시간, 위치, 속도 정보의 정확성에 대한 성능이 분석된다.

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A Fundamental Study on the Receiver Front-End of Satellite Communication (MMIC를 위한 위성통신 수신 전단부의 기초 연구)

  • Chin, Youn-Kang;Yoon, Hyun-Bo;Kang, Hee-Chang;Park, Yhl;Cho, Gwang-Rae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.13 no.4
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    • pp.277-284
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    • 1988
  • A 12GHz low-noise amplifier, a single gate GaAs MESFET mixer, and a low-pass filter have been fabricated for DBS receiver applications by using MIC technology. Each subsystem contains DC block with symmetric line and ship capacitor, respectively. The frequency converter with chip capacitor exhibits a 20-23 dB conversin gain with a RF bandwidth of 11.581-11.981 GHz and an IF bandwidth of 581-981MHz. Rf bandwidth of 12.1GHz and an IF banewidth of 1GHz.

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Three Dimensional Implementation of Intelligent Transportation System Radio Frequency Module Packages with Pad Area Array (PAA(Pad Area Array)을 이용한 ITS RF 모듈의 3차원적 패키지 구현)

  • Jee, Yong;Park, Sung-Joo;Kim, Dong-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.1
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    • pp.13-22
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    • 2001
  • This paper presents three dimensional structure of RF packages and the improvement effect of its electrical characteristics when implementing RF transceivers. We divided RF modules into several subunits following each subunit function based on the partitioning algorithm which suggests a method of three dimension stacking interconnection, PAA(pad area array) interconnection and stacking of three dimensional RF package structures. 224MHz ITS(Intelligent Transportation System) RF module subdivided into subunits of functional blocks of a receiver(RX), a transmitter(TX), a phase locked loop(PLL) and power(PWR) unit, simultaneously meeting the requirements of impedance characteristic and system stability. Each sub­functional unit has its own frequency region of 224MHz, 21.4MHz, and 450KHz~DC. The signal gain of receiver and transmitter unit showed 18.9㏈, 23.9㏈. PLL and PWR modules also provided stable phase locking, constant voltages which agree with design specifications and maximize their characteristics. The RF module of three dimension stacking structure showed $48cm^3$, 76.9% reduction in volume and 4.8cm, 28.4% in net length, 41.8$^{\circ}C$, 37% in maximum operating temperature, respectively. We have found that three dimensional PAA package structure is able to produce high speed, high density, low power characteristics and to improve its functional characteristics by subdividing RF modules according to the subunit function and the operating frequency, and the features of physical volume, electrical characteristics, and thermal conditions compared to two dimensional RF circuit modules.

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