• ETRI Journal
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• v.36 no.3
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• pp.352-360
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• 2014

This paper presents a 900 MHz zero-IF RF transceiver for IEEE 802.15.4g Smart Utility Networks OFDM systems. The proposed RF transceiver comprises an RF front end, a Tx baseband analog circuit, an Rx baseband analog circuit, and a ${\Delta}{\Sigma}$ fractional-N frequency synthesizer. In the RF front end, re-use of a matching network reduces the chip size of the RF transceiver. Since a T/Rx switch is implemented only at the input of the low noise amplifier, the driver amplifier can deliver its output power to an antenna without any signal loss; thus, leading to a low dc power consumption. The proposed current-driven passive mixer in Rx and voltage-mode passive mixer in Tx can mitigate the IQ crosstalk problem, while maintaining 50% duty-cycle in local oscillator clocks. The overall Rx-baseband circuits can provide a voltage gain of 70 dB with a 1 dB gain control step. The proposed RF transceiver is implemented in a $0.18{\mu}$ CMOS technology and consumes 37 mA in Tx mode and 38 mA in Rx mode from a 1.8 V supply voltage. The fabricated chip shows a Tx average power of -2 dBm, a sensitivity level of -103 dBm at 100 Kbps with PER < 1%, an Rx input $P_{1dB}$ of -11 dBm, and an Rx input IP3 of -2.3 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.11
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• pp.1220-1228
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• 2010

In this paper, we suggest a scheme to develop an efficient discrete nonlinear model based on polynomial structure for a RF power amplifier(PA). We describe a procedure to extract a discrete nonlinear model such as Taylor series or memory polynomial by sampling the input and output signal of RF PA. The performance of the model is analyzed varying the model parameters such as sample rate, nonlinear order, and memory depth. The results show that the relative error of the model is converged if the parameters are larger than specific values. We suggest an efficient modeling scheme considering complexity of the discrete model depending on the values of the model parameters. Modeling efficiency index(MEI) is defined, and it is used to extract optimum values for the model parameters. The suggested scheme is applied to discrete modeling of various RF PAs with various input signals such as WCDMA, WiBro, etc. The suggested scheme can be applied to the efficient design of digital predistorter for the wideband transmitter.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.11
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• pp.1239-1247
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• 2012

In this paper, design and fabrication of solid state power amplifier(SSPA) using GaN HEMT chip for X-band frequency are presented. The SSPA consists of the power supply for stable power and the control unit for communication and controlling the internal module, the RF Part to amplify RF signal, In particular the adopted active device for the RF Parts is GaN HEMT Bare chip of TriQuint company, the RF parts consists of pre-stage, drive-stage, main power-stage and each amplifier is designed with input and out matching circuit. The developed power amplifier demonstrated more than 300 W peak output power in condition of 26 % duty, max. pulse width 100us for the X-band frequency( 500 MHz bandwidth) and can apply to marine radar systems.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.9 s.112
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• pp.852-859
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• 2006

This paper suggests a developing approach of EHF TWTA for satellite communications. In order to improve RF performance and gain, we design and realize an EHF TWTA using a linearizer and drive amplifiers. Through the embodiment and experiment of 80 W EHF TWTA, this method satisfies the design specifications. Therefore, this approach is very useful and can be used to develop the similar equipments.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.52 no.1
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• pp.28-34
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• 2003

In this paper, a predistortion linearizer using series diode is proposed for linearizing the power amplifier in microwave radio systems. The power amplifier should be operated near saturation region to achieve high efficiency. But at this region, amplitude and phase distortions of the amplifier remarkably increase with the increase of input power and cause a significant adjacent channel interference. The linearizer is composed of a series diode with a parallel capacitor, which provides positive amplitude and negative phase deviations with the increasing input power. This type of linearizer using the nonlinearity of diode has improved the C/I(Carrier to Intermodulation Distortion) ratio well. By applying this linearizer to two-tone 880MHz power amplifier, adjacent channel leakage power is improved up to 5dBm.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.2 s.332
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• pp.87-92
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• 2005

In this paper, adaptive bias circuit and PBG structure have been employed to suppress IMD and improve PAE (Power Added Efficiency) of the power amplifier. It is controlling the gate 'dc' bias voltage with the envelope of the input RF signal. and The PBG structure has been employed on the output port of power amplifier . The proposed power amplifier using adaptive bias circuit and PBG has been improved the IMG by 3 dBc, and the average PAE by $35.54\%$, respectively.

• Proceedings of the KIEE Conference
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• 2003.07e
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• pp.31-33
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• 2003

Power amplifier linearity plays a major role in the design of RF communication systems. In this paper, predistortion type linearizer was designed an independently controllable AM/AM and AM/PM predistortion linearizers. This linearizer allows independent adjustment of the AM/AM and AM/PM curves by using two adjustable voltages to compensate the power amplifier non-linearities. The predistortion linearizer was improved the ACPR by 6dB with cdma2000 multi carrier signals. Applying this linearizer to two-tone 880MHz power amplifier, an improvement of adjacent channel leakage power up to 5dBm has been achieved.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.501-502
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• 2006

In this paper low power high gain amplifier is suitable for application in low power systems was designed and fabricated. The amplifier used both subthreshold bias for low power and positive feedback Q-enhancement technique for high gain. The amplifier used TSCM $0.18{\mu}m$ RF CMOS technology measures a power gain of 32.3dB, a quality factor of 366 and a power consumption of 3mW in a supply voltage of 1.8V.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.7
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• pp.1289-1295
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• 2007

In this paper, we implemented high-performance concurrent control system which manages whole RF systems with digital type and communicates with remote station on both wire and wireless networking. It consists of FPGA (Field Programmable Gate Array) part which controls forward/reverse LPA (Linear Power Amplifier), forward/reverse LNA (Low Noise Amplifier), channel cut wire/wireless TCP/IP, etc, master microprocessor (AVR), which manages the whole control system, Slave microprocessor which communicates SA (Spectrum Analyzer) and observes frequency spectrum of each channel with the resolution of 5KHz, 10 channel card microprocessor which independently observes each channel card and sets frequency synthesizer in channel cut and other peripherals and logics. The whole system is divided to two parts of H/W (hardware) and S/W (software) considering operational efficiency and concurrency, and implementation and cost. H/W consists of FPGA and microprocessor. We expected the optimized operation through H/W and SW co-design and hybrid H/W architecture.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.325-328
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• 2000

This paper has been studied a rower amplifier for IMT-2000 handset. Circuit design is performed and optimized by using HP ADS RF software. Designed amplifier consist of 2 stage, has 25㏈ gain, over 27㏈m output power and about 40% power efficiency. Power amplifier operation frequency range is 1955${\pm}$70MHz. Mask layout of the designed Amplifier consisting of 4 mask. The measured results of these values are satisfying the specification of IMT-2000 handset.