• 전기전자학회논문지
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• 제26권4호
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• pp.553-559
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• 2022

본 논문에서는 cascode GaN FET의 하프 브릿지 구성에서 오실레이션 억제를 위한 RC 스너버 회로 설계 기술을 분석한다. 대표적인 WBG 소자인 cascode GaN FET는 우수한 고속 스위칭 특성이 우수하다. 다만, 이러한 고속 스위칭 특성으로 인하여 false turn-off 문제가 야기되며, 이를 억제하기 위해 RC 스너버 회로가 필수적이다. 따라서, 일반적으로 많이 사용되는 실험 기반의 선정 기법과 근궤적법을 이용한 분석 기법을 비교한다. 일반적인 방법의 경우 실험적 경험을 바탕으로 오실레이션 억제 성능이 만족될 때까지 지속적인 회로 변경이 필요하다. 하지만, 근궤적 기법의 경우 비진동 R-C 맵을 기반으로 초기값을 설정 할 수 있다. 이러한 설계 기술에 따른 성능을 비교하기 위해 모의실험과 실제 더블 펄스 회로 구성을 통한 실험을 진행하였다.

• 전력전자학회논문지
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• 제27권1호
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• pp.9-17
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• 2022

The series-connected semiconductor devices structure is one way to achieve a high voltage rating. However, a problem with voltage imbalance exists in which different voltages are applied to the series-connected switches. This paper proposed a new voltage balancing technique that controls the turn-off delay time of the switch by adding one bipolar junction transistor to the gate turn-off path. The validity of the proposed method is proved through simulation and experiment. The proposed active gate driver not only enables voltage balancing across a variety of current ranges but also has a greater voltage balancing performance compared with conventional RC snubber methods.

• 전기학회논문지P
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• 제64권3호
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• pp.146-152
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• 2015

In this paper, we propose a boost DC-DC converter using a modification of the passive auxiliary resonant snubber circuit with a DC-DC converter in a typical active auxiliary resonant snubber-bridge inverter. The proposed boost DC-DC converter is small compared to the DC-DC converter according to the soft-switching scheme that requires a general auxiliary switch by realizing the soft switching operation as a DC-DC converter which does not require an auxiliary switch. It is light-weight, switch the turn-on and turn-off switching loss at the time of the superposition of the voltage and current is extremely small, so small. And the reduction of the surge voltage and current of the switch. In addition, the proposed boost DC-DC converter has a high efficiency over a wide load characteristics change area than conventional hard switching PWM boost converter using an RC snubber loss.

• 마이크로전자및패키징학회지
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• 제31권3호
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• pp.99-104
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• 2024

전력전자 기술의 진보와 고효율 전력 반도체에 대한 수요가 증가함에 따라, 기존의 실리콘(Si) 반도체의 한계를 극복하기 위한 대안으로 실리콘 카바이드(SiC) 소자가 주목받고 있다. SiC 소자는 높은 스위칭 속도로 인해 탁월한 스위칭 효율을 가능하게 하지만, 파워모듈 내부에서 발생하는 기생 인덕턴스(Parasitic Inductance)로 인해 전압 진동 및 오버슈트 현상이 발생하여 전기적 신뢰성과 효율성에 문제를 일으킬 수 있다. 이러한 문제를 해결하기 위해 두 가지 접근법을 제시하고 입증하였다. 먼저, RC 스너버 회로를 적용하여 기생 인덕턴스의 영향을 완화함으로써 전기적 안정성을 증대시키는 방법을 시도하였다. 두 번째 방법으로 리드프레임 설계 최적화를 통하여 기생 인덕턴스를 감소시키는 방법을 시도하였다. 이 두 가지 접근법 모두 시뮬레이션과 실험을 통해 검증함으로써 SiC 파워 모듈의 전기적 신뢰성과 효율성을 동시에 향상시킬 수 있음을 보였다.

• 전력전자학회논문지
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• 제26권6호
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• pp.446-453
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• 2021

This paper proposes enhanced single-phase pulse width modulation buck, boost, and buck-boost type ac-ac converters. The proposed converters, where input and output voltages share a common ground, require no isolated voltage sensor and have no leakage current problem. The commutation problem is solved with series-connected switching cell structures without using an additional RC snubber. In addition, with the use of the polarity of input voltage, switching patterns are determined so that the inductor currents can flow through switching devices during all operational modes. Two switches are always turned on during a half-period of the input voltage; thus, the switching loss is significantly reduced. Detailed analysis and experimental results are provided to verify the performance of the proposed converter.

• Journal of Power Electronics
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• 제5권1호
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• pp.67-75
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• 2005

A high efficiency ZVS PWM asymmetrical half bridge converter for a plasma display panel (PDP) sustaining power modules is proposed in this paper. To achieve the ZVS of power switches for the wide load range, a small additional inductor L/sub 1kg/, which also acts as an output filter inductor, is serially inserted into the transformer's primary side. At that point, to solve the problem of ringing in the secondary rectifier caused by L/sub 1kg/, the proposed circuit employs a structure without the output filter inductor, which helps the voltages across rectifier diodes to be clamped at the output voltage. Therefore, no dissipative RC (resistor capacitor) snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since it has no large output inductor filter, the asymmetrical half bridge converter features a simpler structure, lower cost, less mass, and lighter weight. In addition, since all energy stored in L/sub 1kg/ is transferred to the output side, the circulating energy problem can be effectively solved. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385Vdc/170Vdc prototype are presented.

• 전기학회논문지
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• 제63권8호
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• pp.1055-1063
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• 2014

Power losses of a 1-stage DC-DC converter and 2-stage DC-DC converter are compared in this paper. A phase-shift full-bridge DC-DC converter is considered as 1-stage topology. This topology has disadvantages in the stress of rectifier diodes because of the resonance between the leakage inductor of the transformer and the junction capacitor of the rectifier diode. 2-stage topology is composed of an LLC resonant full-bridge DC-DC converter and buck converter. The LLC resonant full-bridge DC-DC converter does not need an RC snubber circuit of the rectifier diode. However, there is the drawback that the switching loss of the buck converter is large due to the hard switching operation. To reduce the switching loss of the buck converter, SiC MOSFET is used. This paper analyzes and compares power losses of two topologies considering temperature condition. The validity of the power loss analysis and calculation is verified by a PSIM simulation model.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.537-541
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• 2004

A high efficiency ZVS PWM asymmetrical half bridge converter for a plasma display panel (PDP) sustaining power module is proposed in this paper. To achieve the ZVS of power switches for the wide fond range, n small additional inductor $L_{lkg}$, which also acts as an output filter inductor, is serially inserted to the transformer primary side. Then, to solve the problem related to ringing in the secondary rectifier caused by $L_{lkg}$, the proposed circuit employs a structure without the output filter inductor, which helps the voltages across rectifier diodes to be clamped at the output voltage. Therefore, no dissipative RC (resistor capacitor) snubber for rectifier diodes is needed and n high efficiency as well as low noise output voltage can be realized. In addition, since it has no large output inductor filter, it features a simpler structure, lower cost, less mass, and lighter weight. Moreover, since all energy stored in $L_{lkg}$ is transferred to the output side, the circulating energy problem can be effectively solved. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385Vdc/170Vdc prototype are presented.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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• pp.341-345
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• 2004

A high efficiency and low device stress voltage and current clamping BVS PWM asymmetrical half bridge converter is proposed in this paper. To achieve the ZVS of power switches along the wide load range, the transformer leakage inductor $L_{Ikg}$ is increased. Then, to solve the problem related to ringing in the secondary rectifier caused by the resonance between $L_{Ikg}$ and rectifier junction capacitors, the proposed converter employs a voltage and current clamping cell, which helps voltages and currents of rectifier diodes to be clamped at the output voltage and output current, respectively. Therefore, no RC-snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since all energy stored in $L_{Ikg}$ is transferred to the output side, the circulating energy problem can be effectively solved and duty loss does net exist. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385-170Vdc prototype are presented.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.2067-2069
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• 1998

A prototype semiconductor switch for the command resonant charging system has been developed for a line type modulator, which charges parallel pulse forming network(PFN) up to voltage of 5 kV at repetition rates of 60 Hz. A phase controlled power supply provides charging of the 4.7 ${\mu}s$ filter capacitor bank to voltage up to 5 kV. A solid state module of series stack array of sixe matched SCRs(1.6 kV, 50 A) is used as a command charging switch to initiate the resonant charging cycle. Both resistive and RC snubber network are used across each stage of the switch assembly in order to ensure proper voltage division during both steady state and transient condition. A master trigger signal is generated to trigger circuits which are transmitted through pulse transformer to each of the 6 series switch stages. A pulse transformer is required for high voltage trigger or power isolation. This paper will discuss trigger method, protection scheme, circuit simulation, and test result.