• 한국초전도ㆍ저온공학회논문지
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• 제5권1호
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• pp.44-47
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• 2003

There are several simulation programs in studying superconductor RSFQ (Rapid Single flux Quantum) electronic devices, which include WRspice, WinS, PSCAN, and JSIM. Even though different research groups use different simulation programs, it is not well known about which program gives the simulation results closer to the measurement values. In this work, we used both WRspice and WinS to simulate RSFQ OR gate and to compare the results from the different simulations. This comparison would help in deciding which program is better in the RSFQ circuit design. In the confluence buffer, which is the one of the main components of the DR gate, the measured bias margins were ${\times}23.2%$, while the margins from the simulations were ${\pm}35.56%$ from WRspice and it 53.1% from WinS. However, with the actual fabricated circuit parameters WRspice gave ${\pm}27%$. In WinS the circuit did not operate. We concluded that WRspice is more reliable.

• Journal of Electrochemical Science and Technology
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• 제1권2호
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• pp.69-74
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• 2010

Methodologies to improve photovoltaic performance of dye-sensitized solar cell (DSSC) are reviewed. DSSC is usually composed of a dye-adsorbed $TiO_2$ photoanode, a tri-iodide/iodide redox electrolyte and a Pt counter electrode. Among the photovoltaic parameters of short-circuit photocurrent density, open-circuit voltage and fill factor, short-circuit photocurrent density is the collective measure of light harvesting, charge separation and charge collection efficiencies. Internal quantum efficiency is known to reach almost 100%, which indicates that charge separation occurs without loss by recombination. Thus, light harvesting efficiency plays an important role in improvement of photocurrent. In this paper, technologies to improve light harvesting efficiency, including surface area improvement by nano-dispersion, size-dependent light scattering efficiency, bi-functional nano material, panchromatic absorption by selective positioning of three different dyes and transparent conductive oxide (TCO)-less DSSC, are introduced.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2003년도 추계학술대회 논문집
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• pp.113-116
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• 2003

Confluence buffers and single flux quantum (SFQ) switches are essential components in constructing a high speed superconductive Arithmetic Logic Unit (ALU). In this work, we developed a SFQ confluence buffer and an SFQ switch. It is very important to optimize the circuit parameters of a confluence buffer and an SFQ switch to implement them into an ALU. The confluence buffer that we are currently using has a small bias margin of $\pm$11％. By optimizing it with a Josephson circuit simulator, we improved the design of confluence buffer. Our simulation study showed that we improved bias global margin of 10％ more than the existent confluence buffer. In simulations, the minimal bias margin was $\pm$33％. We also designed, fabricated, and tested an SFQ switch operating in a DC mode. The mask layout used to fabricate the SFQ switch was obtained after circuit optimization. The test results of our SFQ switch showed that it operated correctly and had a reasonably wide margin of $\pm$15％.

• Journal of Electrical Engineering and Technology
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• 제9권5호
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• pp.1670-1676
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• 2014

This paper presents the modeling of Single Electron Transistor (SET) based on Physical model of a device and its equivalent circuit. The physical model is derived from Schrodinger equation. The wave function of the electrode is calculated using Hartree-Fock method and the quantum dot calculation is obtained from WKB approximation. The resulting wave functions are used to compute tunneling rates. From the tunneling rate the current is calculated. The equivalent circuit model discuss about the effect of capacitance on tunneling probability and free energy change. The parameters of equivalent circuit are extracted and optimized using genetic algorithm. The effect of tunneling probability, temperature variation effect on tunneling rate, coulomb blockade effect and current voltage characteristics are discussed.

• Progress in Superconductivity
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• 제5권1호
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• pp.13-16
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• 2003

In this work, we have studied about an RSFQ (Rapid Single Flux Quantum) switch element. The circuit was designed, simulated, and laid out for mask fabrication. The switch cell was composed of a D flip-flop, a splitter, a confluence buffer, and a switch core. The switch core determined if the input data could pass to the output. “On” and o“off” controls in the switch core could be possible by utilizing an RS flip-flop. When a control pulse was input to the “on” port, the RS flip-flop was in the set state and passed the input pulses to the output port. When a pulse was input to the “off” port, the RS flip-flop was in the reset state and prevented the input pulses from transferring to the output port. We simulated and optimized the switch element circuit by using Xic, WRspice, and Julia. The minimum circuit margins in simulations were more than $\pm$20%. We also performed the mask layout of the circuit by using Xic and Lmeter.

• 문화기술의 융합
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• 제6권4호
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• pp.819-824
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• 2020

본 논문에서는 차세대 디지털 회로 설계기술인 양자점 셀룰러 오토마타(QCA)를 이용하여 새로운 멀티플렉서를 제안한다. 디지털 회로 중 멀티플렉서는 입력 신호 중 하나를 선택하여 하나의 라인에 전달하는 회로이다. 이는 D-플립플롭, 레지스터, 그리고 RAM 셀 등 많은 회로에 쓰이므로 현재까지도 다양한 연구가 이루어지고 있다. 하지만 기존에 제안된 평면구조 멀티플렉서는 연결성을 고려하지 않아 큰 회로를 설계할 경우 비효율적으로 면적을 사용하게 된다. 기존에 다층구조로 제안된 멀티플렉서도 있으나 셀 간 상호작용을 고려하지 않아 필요면적이 여전히 높다. 이에 본 논문에서는 셀 간 상호작용을 이용하고, 다층구조를 이용하여 38% 면적축소, 17% 비용감소 그리고 연결성을 개선한 새로운 멀티플렉서를 제안한다.

• Journal of Power Electronics
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• 제14권2호
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• pp.226-236
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• 2014

A new active LED driver with high power factor (PF) and low total harmonic distortion (THD) compatible with a rapid-start ballast is proposed. An LC input filter is attached to the ballast to increase PF and reduce THD. A boost converter is then installed to regulate the LED current, where an unstable operating region has been newly identified. The unstable region is successfully stabilized by feedback control with two zeroes. The extremely high overall system of the 10th order is completely analyzed by the newly introduced phasor transformed circuits in static and dynamic analyses. Although a small DC capacitor is utilized, the flicker percentage of the LED is drastically mitigated to 1% by the fast controller. The proposed LED driver that employs a simple controller with a start-up circuit is verified by extensive experiments whose results are in good agreement with the design.

• 전력전자학회논문지
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• 제21권3호
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• pp.275-281
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• 2016

A novel bidirectional magnetic wireless communication system is proposed in this study. This system provides the communication capability between the source and load sides by high-frequency signal while wireless power is transferred. Contrary to the conventional wireless communication systems using complex IC circuit and active components, the proposed system is simply composed of passive components. It is practical and beneficial for environmental robustness, cost effectiveness, and simple implementation. The detailed static analysis of the proposed system for power and communication lines is established. The proposed system is experimentally verified, and results show that a 0.1 voltage gain for communication line is obtained while a 2.0 voltage gain for the power line is achieved. The proposed system is adequate for practical applications as it allows the inductive power transfer system to wirelessly and easily communicate between the source and load sides.

• Progress in Superconductivity
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• 제4권1호
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• pp.74-79
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• 2002

High-speed probe made to test single flux quantum(SFQ) circuits was comprised of semi-rigid coaxial cables and microstrip lines. The impedance was set at 50 $\Omega$to carry high-speed signals without much loss. To do performance test of high-speed probe, we have attempted to fabricate a test chip which has a coplanar waveguide(CPW) structure. Electromagnetic simulation was done to optimize the dimension of CPW so that the CPW structure has an impedance of 50$\Omega$, matching in impedance with the probe. We also used the simulation to investigate the effect of the width of signal line and the gap between signal line and ground plane to the characteristics of CPW structure. We fabricated the CPW structure with a gold film deposited on Si wafer whose resistivity was above $1.5\times$10$_4$$\Omega$.cm. The magnitudes of S／sub 21／ of CPW at 6 ㎓ in simulations and in the actual measurements done with a network analyzer were: -0.1 ㏈ and -0.33 ㏈ (type A),-0.2 ㏈ and -0.48 ㏈ (type B), respectively. Using the test chip, we have successfully tested the performance of high-speed probe made for SFQ circuits. The probe showed the good performance overthe bandwidth of 10 ㎓.

• 한국초전도ㆍ저온공학회논문지
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• 제4권1호
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• pp.35-39
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• 2002

We have simulated and laid out a Single Flux Quantum(SFQ) AND gate for Arithmetic Logic Unit by using XIC, WRspice and Lmeter. SFQ AND gate circuit is a combination of two D Flip-Flop. D Flip-Flop and dc SQUID are the similar shape form the fact that it has the loop inductor and two Josephson junction We obtained perating margins and accomplished layout of the AND gate. We got the margin of $\pm$38%. over. After layout, we drew mask for fabrication of SFQ AND sate. This mask was included AND gate, dcsfq, sfqdc, rs flip-flop and jtl.