• 대한기계학회논문집
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• 제16권11호
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• pp.2196-2202
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• 1992

본 연구에서는 초전도 양자 간섭장치(SQUID, superconductiong quantum inte- rference device)를 냉각시킬 수 있는 정도의 소용량(3.995K에서 0.1W)의 GM/J-T 냉동 기에 대하여 요구되는 냉각용량을 만족시키면서 최대의 성능을 나타낼 수 있는 열교환 기의 면적배분 조건을 구하였다. 즉 냉동 성능을 알고 있는 상용 2단 GM 냉동기와 소형 극저온 냉동기에 널리 사용되는 열교환기로 이루어진 복합적인 GM/J-T 냉동기에 대하여 열교환기 총면적이 주어졌을 때, J-T 회로내의 냉매(헬륨)의 유량과 각 열교환 기 전열 면적의 비를 변수로 최적설계를 행하였다.

• 한국전자통신학회논문지
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• 제15권4호
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• pp.659-664
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• 2020

본 논문에서는 실리콘 기반의 광 집적회로에서 외부 전압 조절을 통해 |l|=1 궤도 각운동량 모드의 궤도 각양자수를 변조할 수 있는 전기 광학 변조기를 설계하였다. 설계된 전기 광학 변조기는 위치별로 서로 다른 도핑농도를 가지는 실리콘 코어와 실리콘 산화막으로 구성되어 있으며, 도핑농도의 분포를 통해 궤도 각운동량 모드를 구성하는 두 고유 모드의 전파 손실과 유효굴절률 변화량을 조절할 수 있도록 설계되었다. 변조기는 역전압을 기준으로 -0.33V에서는 궤도 각운동량 모드의 부호가 유지되는 광도파로로, 10V에서는 궤도 각양자수 부호 변환기로서 동작한다. 고유 모드 확장법으로 계산한 신호변조 후의 전기장 분포를 통해 얻은 궤도 각양자수는 두 동작모드에서 모두 |l|>0.92 으로 매우 높은 궤도 각운동량 모드 순도를 보였다.

• Current Photovoltaic Research
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• 제11권3호
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• pp.67-74
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• 2023

The earth-abundant element-based Cu₂ZnSn(S,Se)₄ (CZTSSe) thin film solar cells (TFSCs) have attracted greater attention in the photovoltaic (PV) community due to their rapid development in device power conversion efficiency (PCE) >13%. In the present work, we demonstrated the fine-tuning of the bandgap in the CZTSSe TFSCs by altering the sulfur (S) to the selenium (Se) chalcogenide ratio. To achieve this, the CZTSSe absorber layers are fabricated with different S/(S+Se) ratios from 0.02 to 0.08 of their weight percentage. Further compositional, morphological, and optoelectronic properties are studied using various characterization techniques. It is observed that the change in the S/(S+Se) ratios has minimal impact on the overall Cu/(Zn+Sn) composition ratio. In contrast, the S and Se content within the CZTSSe absorber layer gets altered with a change in the S/(S+Se) ratio. It also influences the overall absorber quality and gets worse at higher S/(S+Se). Furthermore, the device performance evaluated for similar CZTSSe TFSCs showed a linear increase and decrease in the open circuit voltage (V_oc) and short circuit current density (J_sc) of the device with an increasing S/(S+Se) ratio. The external quantum efficiency (EQE) measured also exhibited a linear blue shift in absorption edge, increasing the bandgap from 1.056 eV to 1.228 eV, respectively.

• Journal of Astronomy and Space Sciences
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• 제11권1호
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• pp.41-52
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• 1994

Currently, the CCDs are widely used in astronomical observations either in direct imaging use or spectroscopic mode. However according to the recent technical advances, new large format CCDs are rapidly developed which have better performances with higher quantum efficiency and sensitivity. In many cases, some microprocessors have been adopted to deal with necessary digital logic for a CCD imaging system. This could often lack the flexibility of a system for a user for to upgrade with new devices, especially if it is a commercial product. A new design concept has been explored which could provide the opportunity to deal with any format of devices from any manufactures effectively for as tronomical purposes. Recently available PLD (Programmable Logic Devices)technology makes it possible to develop such digital circuit design, which can be integrated into a single component, instead of using micrprocessors. The design concept could dramatically increase the efficiency and flexibility of a CCD imaging system, particularly when new or large format devices are available and to upgrade the performance of a system. Some variable system control parameters can be selected by a user with a wider range of choice. The software can support such functional requirements very conveniently. This approach can be applied not only to astronomical purpose, but also to some related fields, such as remote sensing and industrial applications.

• Journal of Semiconductor Engineering
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• 제1권1호
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• pp.57-63
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• 2020

Complementary metal-oxide-semiconductor (CMOS) technology is now facing a power scaling limit to increase integration density. Since 1970s, multi-valued logic (MVL) has been considered as promising alternative to resolve power scaling challenge for increasing information density up to peta-scale level by reducing the system complexity. Over the past several decades, however, a power-scalable and mass-producible MVL technology has been absent so that MVL circuit and system implementation have been delayed. Recently, compact MVL device researches incorporating multiple-switching characteristics in a single device such as 2D heterojunction-based negative-differential resistance (NDR)/transconductance (NDT) devices and quantum-dot/superlattices-based constant intermediate current have been actively performed. Meanwhile, wafer-scale, energy-efficient and variation-tolerant ternary-CMOS (T-CMOS) technology has been demonstrated through commercial foundry. In this review paper, an overview for MVL development history including recent studies will be presented. Then, the status and its future research direction of MVL technology will be discussed focusing on the T-CMOS technology for peta-scale information processing in semiconductor chip.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.332-335
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• 2000

We fabricated organic electroluminescent (EL) devices with single layer of poly(3-dodeoylthiophene) (P3DoDT) hlended with different amounts of poly(N-vinylcarbazole) (PVK) as a emitting layer. The molar ratio between P3DoDT and PVK changed with 1:0, 2:1 and 1:1. To improve the external quantum efficiency of EL devices, we applied insulating layer, LiF layer, between polymer emitting layer and Al electrode. All of the devices emit orange-red light and it's can be explained that the energy transfer occurs from PVK to P3DoDT. In the voltage-current and voltage-brightness characteristics of devices applied LiF layer, current and brightness increased with increasing applied voltage. The brightness of the device have a molar ratio 1:1 with LiF layer was about 10 times larger than that of the device without PVK at 6V. Electrical impedance properties of ITO/emitting layer/LiF/Al devices were investigated. In the Cole-Cole plots of impedance data, one semicircle was observed. Therefore, the equivalent circuit for the devices can be designed as a single parallel resistor and capacitor network with series resistor.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.90.2-90.2
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• 2013

Vertically-aligned silicon nanostructure arrays (SNAs) have been drawing much attention due to their useful electrical properties, large surface area, and quantum confinement effect. SNAs are typically fabricated by chemical vapor deposition, reactive ion etching, or wet chemical etching. Recently, metal-assisted chemical etching process, which is relatively simple and cost-effective, in combination with nanosphere lithography was recently demonstrated for vertical SNA fabrication with controlled SNA diameters, lengths, and densities. However, this method exhibits limitations in terms of large-area preparation of unperiodic nanostructures and SNA geometry tuning independent of inter-structure separation. In this work, we introduced the layerby- layer deposition of polyelectrolytes for holding uniformly dispersed polystyrene beads as mask and demonstrated the fabrication of well-dispersed vertical SNAs with controlled geometric parameters on large substrates. Additionally, we present a new means of building in vitro neuronal networks using vertical nanowire arrays. Primary culture of rat hippocampal neurons were deposited on the bare and conducting polymer-coated SNAs and maintained for several weeks while their viability remains for several weeks. Combined with the recently-developed transfection method via nanowire internalization, the patterned vertical nanostructures will contribute to understanding how synaptic connectivity and site-specific perturbation will affect global neuronal network function in an extant in vitro neuronal circuit.

• 한국초전도ㆍ저온공학회논문지
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• 제24권4호
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• pp.6-10
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• 2022

We report on the fabrication and measurements of metallic Josephson junctions (JJs) consisting of Au nanoribbon and NbTi superconducting electrodes. The maximum supercurrent density in the junction reaches up to ~ 3×10⁵ A/cm² at 2.5 K, much larger than that of JJ using single-crystalline Au nanowire. Temperature dependence of the critical current exhibits an exponential decay behavior with increasing temperature, which is consistent with a long and diffusive junction limit. Under the application of a magnetic field, monotonous decrease of the critical current was observed due to a narrow width of the Au nanoribbon. Our observatons suggest that NbTi/Au/NbTi JJ would be a useful platform to develop an integrated superconducing quantum circuit combined with the superconducting coplanar waveguide and ferromagnetic π junctions.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2022년도 춘계학술발표대회
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• pp.165-168
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• 2022

특정 문제를 효율적으로 모델링하고 해결할 수 있는 자체적인 특성을 가지고 있는 양자 컴퓨터는 다양한 컴퓨팅 분야에서 강세를 보일 것으로 기대된다. 이러한 양자 컴퓨터는 가까운 미래에 암호학계에 다가올 가장 큰 위협으로 여겨지고 있다. 공개키 암호와는 달리 대칭키 암호에서 기반하고 있는 문제들은 양자 컴퓨터에 대해 아직은 안전할 것으로 여겨지지만, 안전한 양자 후 보안 시스템을 구축하기 위해 이에 대한 파급력을 확인하는 연구들이 수행되고 있다. NIST는 대칭키 암호 AES에 대한 상대적인 양자 공격 비용에 따라 양자 후 보안 강도를 추정하고 있으며, 이에 본 논문에서는 AES에 대한 양자 회로를 구현하고 공격 비용을 추정하는 다양한 연구들에 대해 살펴본다.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2023년도 춘계학술발표대회
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• pp.227-229
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• 2023

양자컴퓨터는 큐비트(qubit)의 얽힘(entanglement)과 중첩(superposition) 성질을 통해 동시에 연산을 수행할 수 있어 고전컴퓨터에 비해 연산 속도가 획기적으로 빠르다. 전수조사 연산을 매우 빠르게 수행할 수 있는 양자 알고리즘인 Grover 알고리즘을 사용하면, n-bit 보안강도를 가지는 SHA2와 같은 해시함수를 n/2-bit 보안강도로 낮추게 되어 해시함수가 적용되는 분야의 보안을 위협하게 된다. 양자컴퓨터를 통한 해킹에는 많은 양자 자원이 요구되고, 안정적인 구동 환경이 갖춰져야 하기 때문에 실현되기 위해서는 아직까지 상당한 시간이 소요될 것으로 보인다. 이에 연구자들은 필요한 양자 자원을 최소화하는 효율적인 양자 공격 회로를 제시하며 연구를 수행하고 있다. 본 논문에서는 이러한 SHA2 해시함수에 대한 양자 회로 구현 동향에 대해 살펴본다.