• Title/Summary/Keyword: Pulse interval

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The Decomposition of EMG signals using Template Matiching Method in the frequency domain (주파수 템플릿 정합법을 사용한 EMG 신호 분해)

  • Park, S.H.;Lee, Y.W.;Go, H.W.;Ye, S.Y.;Eom, S.H.;Nam, K.G.;Jun, K.R.
    • Proceedings of the KOSOMBE Conference
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    • v.1997 no.11
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    • pp.55-58
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    • 1997
  • In this paper, we study a signal processing method which extracts each MUAP(motor unit action potential) from EMG(Electromyogram) interference pattern or clinical diagnostic purposes. First of all, differential digital filtering is selected or eliminating the spike components of the MUAP's from the background noise. And, the algorithm identifies the spikes over the certanin threshold by template matching in frequency domain. After missing or false firing actor is cut off at the IPI(inter pulse interval) histogram, we averages the MUAP waveforms from the raw signal using the identified spikes as triggers, and Finally, measures their amplitudes, durations, and numbers of phases. Specially, We introduce algorithm performed by template matching in the frequency domain. A typical 3-s signal recorded from the biceps brachii muscle using a conventional needle electrode during a isometric contraction is used. Finally, the method decomposed five simultaneous active MUAP's from original EMG signal.

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A Study on APC-MPC in 8kbps of Convergence System (융복합 시스템의 8kbps에 있어서 APC-MPC에 관한 연구)

  • Lee, See-Woo
    • Journal of Digital Convergence
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    • v.13 no.7
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    • pp.177-182
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    • 2015
  • In a MPC(Multi-Pulse Coding) using excitation source of voiced and unvoiced, it would be a distortion of voice waveform. This is caused by normalization of synthesis speech waveform of voiced in the process of restoration. To solve this problem, this paper present APC-MPC of amplitude-position compensation in a multi-pulses each pitch interval in order to reduce distortion of synthesis waveform. Also, I was implemented that the APC-MPC in coding system. And I evaluate the SNRseg of APC-MPC in 8kbps coding condition of convergence system. As a result, SNRseg of APC-MPC was 13.9dB for female voice and 14.3dB for male voice respectively. And so, I expect to be able to this method for cellular phone and smart phone using excitation source of low bit rate.

Analysis, Design and Implementation of a Soft Switching DC/DC Converter

  • Lin, Bor-Ren
    • Journal of Power Electronics
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    • v.13 no.1
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    • pp.20-30
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    • 2013
  • This paper presents a soft switching DC/DC converter for high voltage application. The interleaved pulse-width modulation (PWM) scheme is used to reduce the ripple current at the output capacitor and the size of output inductors. Two converter cells are connected in series at the high voltage side to reduce the voltage stresses of the active switches. Thus, the voltage stress of each switch is clamped at one half of the input voltage. On the other hand, the output sides of two converter cells are connected in parallel to achieve the load current sharing and reduce the current stress of output inductors. In each converter cell, a half-bridge converter with the asymmetrical PWM scheme is adopted to control power switches and to regulate the output voltage at a desired voltage level. Based on the resonant behavior by the output capacitance of power switches and the transformer leakage inductance, active switches can be turned on at zero voltage switching (ZVS) during the transition interval. Thus, the switching losses of power MOSFETs are reduced. The current doubler rectifier is used at the secondary side to partially cancel ripple current. Therefore, the root-mean-square (rms) current at output capacitor is reduced. The proposed converter can be applied for high input voltage applications such as a three-phase 380V utility system. Finally, experiments based on a laboratory prototype with 960W (24V/40A) rated power are provided to demonstrate the performance of proposed converter.

A Experimental Study on the Formal and Physiological Change of Body according to the Wearing-Brassiere Condition. (Brassiere 착용조건에 따른 신체의 형태적, 생리적 변화에 관한 심리적 연구)

  • 박영득
    • Journal of the Korean Home Economics Association
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    • v.29 no.1
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    • pp.27-35
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    • 1991
  • This study was carried out to investigate the influence of the various physiological function caused by brassiere wearing. The four experimental methods used in this study are as follows. For example, the Roentgen photographing, Body measurement by Sliding Gauge, the measurement of the Electrocardiogram and Blood Pressure. The results of the Electrocardiogram and Blood Pressure. The results of the investigation were as follows: 1. In experimental change by Sliding Gauge and Body measurement, The bust point was rised in order AB1>B2. The width of right and left bust point was decreased in order of A>B1>B2. According to, The supplementary effect of brassiere wearing was excellent in B2. 2. In the change of various organs by Roentgen photographing, The width of the chest and size of the heart were decreased in regular order of A>B1>B2. The diaphragm and the others were not showed change. 3. In the experimental result by measurement of the electrocardiogram, The interval of heart palpitation was decreased in order A>B1>B2 and the pulse frequency was similar. 4. In the experimental result by the blood pressure measurement, A had the highest blood pressure and B2 had the lowest pressure in all variables.

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Analysis and Implementation of a New ZVS DC Converter for Medium Power Application

  • Lin, Bor-Ren;Shiau, Tung-Yuan
    • Journal of Electrical Engineering and Technology
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    • v.9 no.4
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    • pp.1296-1308
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    • 2014
  • This paper presents a new zero voltage switching (ZVS) converter for medium power and high input voltage applications. Three three-level pulse-width modulation (PWM) circuits with the same power switches are adopted to clamp the voltage stress of MOSFETs at $V_{in}/2$ and to achieve load current sharing. Thus, the current stresses and power ratings of transformers and power semiconductors at the secondary side are reduced. The resonant inductance and resonant capacitance are resonant at the transition interval such that active switches are turned on at ZVS within a wide range of input voltage and load condition. The series-connected transformers are adopted in each three-level circuit. Each transformer can work as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer. Thus, no output inductor is needed at the secondary side. Three center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Compared with the conventional parallel three-level converters, the proposed converter has less switch counts. Finally, experiments based on a 1.44kW prototype are provided to verify the operation principle of proposed converter.

A New Driving Method for Gray-scale Expression in an AC Plasma Display Panel (교류형 플라즈마 디스플레이 패널에서 계조표현을 위한 새로운 구동방식)

  • 김재성;황현태;서정현;이석현
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.53 no.8
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    • pp.407-414
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    • 2004
  • In this paper, a new gray scale expression method that divides the scan lines into multiple blocks is suggested. The proposed method can drive 16 sub-fields per 1 TV field in the panel with XGA ($1366{\times}768$) resolution. The on and off states of even subfields depend on the condition of odd subfields. The write address mode is used in the odd subfields, while the erase address mode is used in the even subfields. Because the ramp reset pulse is applied every 2 sub-fields, both the contrast ratio and the dynamic voltage margin are sufficiently obtained in comparison with previous AWD (Address While Display) methods. In realizing 16 subfields, shortening the scan time in the erase address period was important. The X bias voltage in the erase address period affected the minimum address voltage but did not the delay time of the address discharge. The delay time of the address discharge was affected by the address voltage and the time interval between the last sustain discharge and the scanning time. We also evaluated the dynamic false contour. New method shows an improved image quality in horizontal moving, but discontinuous lines were observed at the boundaries of each block in vertical moving

Interleaved ZVS DC/DC Converter with Balanced Input Capacitor Voltages for High-voltage Applications

  • Lin, Bor-Ren;Chiang, Huann-Keng;Wang, Shang-Lun
    • Journal of Power Electronics
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    • v.14 no.4
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    • pp.661-670
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    • 2014
  • A new DC/DC converter with zero voltage switching is proposed for applications with high input voltage and high load current. The proposed converter has two circuit modules that share load current and power rating. Interleaved pulse-width modulation (PWM) is adopted to generate switch control signals. Thus, ripple currents are reduced at the input and output sides. For high-voltage applications, each circuit module includes two half-bridge legs that are connected in series to reduce switch voltage rating to $V_{in}/2$. These legs are controlled with the use of asymmetric PWM. To reduce the current rating of rectifier diodes and share load current for high-load-current applications, two center-tapped rectifiers are adopted in each circuit module. The primary windings of two transformers are connected in series at the high voltage side to balance output inductor currents. Two series capacitors are adopted at the AC terminals of the two half-bridge legs to balance the two input capacitor voltages. The resonant behavior of the inductance and capacitance at the transition interval enable MOSFETs to be switched on under zero voltage switching. The circuit configuration, system characteristics, and design are discussed in detail. Experiments based on a laboratory prototype are conducted to verify the effectiveness of the proposed converter.

Analysis and Implementation of a New Three-Level Converter

  • Lin, Bor-Ren;Nian, Yu-Bin
    • Journal of Power Electronics
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    • v.14 no.3
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    • pp.478-487
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    • 2014
  • This study presents a new interleaved three-level zero-voltage switching (ZVS) converter for high-voltage and high-current applications. Two circuit cells are operated with interleaved pulse-width modulation in the proposed converter to reduce the current ripple at the input and output sides, as well as to decrease the current rating of output inductors for high-load-current applications. Each circuit cell includes one half-bridge converter and one three-level converter at the primary side. At the secondary side, the transformer windings of two converters are connected in series to reduce the size of the output inductor or switching current in the output capacitor. Based on the three-level circuit topology, the voltage stress of power switches is clamped at $V_{in}/2$. Thus, MOSFETs with 500 V voltage rating can be used at 800 V input voltage converters. The output capacitance of the power switch and the leakage inductance (or external inductance) are resonant at the transition interval. Therefore, power switches can be turned on under ZVS. Finally, experiments verify the effectiveness of the proposed converter.

A Method Eliminating the Interference Signal for the Test of the Radar Electronic Protection Performance (레이더 전자보호 성능시험을 위한 송.수신 간섭신호 제거 기법)

  • Jung, Hoi-In;Lee, Sung-Ho
    • Journal of the Korea Institute of Military Science and Technology
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    • v.13 no.4
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    • pp.569-576
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    • 2010
  • Jamming simulator has developed for the purpose of the test and evaluation on the electronic protection capabilities of the tracking radar onboard ship. This simulator has the capabilities to generate and radiate the jamming signals against the radar as well as those to receive, analyze and identify the radar signals at a real sea environment. The limited space of ship superstructure has led to the serious distortion caused by the ring around phenomenon that some sidelobes of the jamming beams were coming back to the receiving antenna. In this paper, we have proposed the methods to eliminate the ring around. First, we have inserted the groove metal screen between transmitting and receiving antennas. Second, we have used the PRI(Pulse Repetition Interval) tracking loop to control the switching timing of the input radar and the output jamming signal. Finally, we have demonstrated the performance and effectiveness of the proposed methods through the sea trial.

Improvement of Fatigue Properties in Ferroelectric Dy-Doped Bismuth Titanate(BDT) Thin Films Deposited by Liquid Delivery MOCVD System (Liquid Delivery MOCVD로 증착된 강유전체 BDT 박막의 피로 특성 향상)

  • Kang, Dong-Kyun;Park, Won-Tae;Kim, Byong-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.171-171
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    • 2007
  • Dysprosium-doped bismuth titanate (BDT) thin films were successfully deposited on Pt(111)/Ti/$SiO_2$/Si(100) substrates by liquid delivery MOCVD process and their structural and ferroelectric properties were characterized. Fabricated BDT thin films were found to be random orientations, which were confirmed by X-ray diffraction experiment and scanning electron microscope analysis. The crystallinity of the BDT films was improved and the average grain size increased as the crystallization temperature increased from 600 to $720^{\circ}C$ at an interval of $40^{\circ}C$. The BDT thin film annealed at $720^{\circ}C$ showed a large remanent polarization (2Pr) of $52.27\;{\mu}C/cm^2$ at an applied voltage of 5V. The BDT thin film exhibits a good fatigue resistance up to $1.0{\times}10^{11}$ switching cycles at a frequency of 1 MHz with applied pulse of ${\pm}5\;V$. These results indicate that the randomly oriented BDT thin film is a promising candidate among ferroelectric materials useti비 in lead-free nonvolatile ferroelectric random access memory applications.

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