• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2001.11a
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• pp.145-149
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• 2001

The most of faults in gas insulation of power facilities are caused by partial discharge. Therefore we simulated partial discharge and measured the radiated electromagnetic wave emitted from partial discharge in SF$_{6}$ gas by biconical antenna. This paper describes time delay and electric fields pulse characteristics of radiated electromagnetic waves with distance(1[m], 3[m], 5[m]) between antenna and discharge source.e.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.587-588
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• 2008

Digital PLL을 위한 높은 해상도를 갖는 TDC(Time to Digital Converter)를 $0.18{\mu}m$ CMOS 공정으로 설계하였다. 2단 구조를 갖는 TDC를 제안하였고 이를 Cadence Spectre를 이용하여 검증하였다. TDC는 Difference pulse generator, coarse 변환기와 fine 변환기로 구성된다. 그리고, 2단 변환기와 Thermometer decoder를 이용하여 delay cell의 수를 적게 유지하면서도 높은 해상도를 얻을 수 있었다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.18 no.5
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• pp.10-14
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• 1981

This paper deals with design of circuit that gives a linear relationship between the voltage controlling the Phase delay an인e of thrysistor trigger pulse and the average voltage in the load. The design is based an the method of linear triggering of thrysistion. It is shown that method is also effective with the input signal how variable frequencies.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.57-60
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• 1999

In many radio communication environments, there is a special component, called inter-symbol interference (ISI), mused by multipath time delay of signal and ISI components impose limitation of the data transmission rate. In this paper, we consider signaling pulse shapes, called partial response signaling (PRS), for minimizing the effect of ISI and show the improvement of performance by applying one of the partial-response signaling (PRS) pulses to two types of receiver system under dependent noise environments through the Monte-Carlo computer simulations.

• Proceedings of the Optical Society of Korea Conference
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• 1991.06a
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• pp.102-108
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• 1991

Utilizing self-phase modulation effects of a dispersion-shifted fiber and delay-line characteristics of two gratings, mode-locked 80 ps pulses at 1.319${\mu}{\textrm}{m}$ wavelength from a Nd: YAG laser are compressed down to 2.1 ps. These pulses are further compressed down to 340 fs using higher order soliton effects in a common single mode fiber.

• 전기의세계
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• v.21 no.1
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• pp.17-21
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• 1972

Electrical resistivity and switching phenomena in glass semiconductor of AsTe and AsTeGa is studied. Samples sliced from ingot which is air quenched or water quenched, show high resistivity at room temperature. The resistivity of the AsTe and AsTeGa is 1*10$^{6}$ .ohm.-cm and 5*10$^{6}$ .ohm.-cm at 27.deg. C. Switching phenomena take place in thin the thick samples. Holding voltage is different with the thickness of the samples and the characteristics of switching in the thin and thick samhles are similar. When square wave pulse voltage is applied, delay time is detected to 5.mu.sec by oscilloscpoe.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.155.2-155.2
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• 2013

Strain-relaxed SiGe layer on Si substrate has numerous potential applications for electronic and opto- electronic devices. SiGe layer must have a high degree of strain relaxation and a low dislocation density. Conventionally, strain-relaxed SiGe on Si has been manufactured using compositionally graded buffers, in which very thick SiGe buffers of several micrometers are grown on a Si substrate with Ge composition increasing from the Si substrate to the surface. In this study, a new plasma process, i.e., the combination of PIII&D and HiPIMS, was adopted to implant Ge ions into Si wafer for direct formation of SiGe layer on Si substrate. Due to the high peak power density applied the Ge sputtering target during HiPIMS operation, a large fraction of sputtered Ge atoms is ionized. If the negative high voltage pulse applied to the sample stage in PIII&D system is synchronized with the pulsed Ge plasma, the ion implantation of Ge ions can be successfully accomplished. The PIII&D system for Ge ion implantation on Si (100) substrate was equipped with 3'-magnetron sputtering guns with Ge and Si target, which were operated with a HiPIMS pulsed-DC power supply. The sample stage with Si substrate was pulse-biased using a separate hard-tube pulser. During the implantation operation, HiPIMS pulse and substrate's negative bias pulse were synchronized at the same frequency of 50 Hz. The pulse voltage applied to the Ge sputtering target was -1200 V and the pulse width was 80 usec. While operating the Ge sputtering gun in HiPIMS mode, a pulse bias of -50 kV was applied to the Si substrate. The pulse width was 50 usec with a 30 usec delay time with respect to the HiPIMS pulse. Ge ion implantation process was performed for 30 min. to achieve approximately 20 % of Ge concentration in Si substrate. Right after Ge ion implantation, ~50 nm thick Si capping layer was deposited to prevent oxidation during subsequent RTA process at $1000^{\circ}C$ in N2 environment. The Ge-implanted Si samples were analyzed using Auger electron spectroscopy, High-resolution X-ray diffractometer, Raman spectroscopy, and Transmission electron microscopy to investigate the depth distribution, the degree of strain relaxation, and the crystalline structure, respectively. The analysis results showed that a strain-relaxed SiGe layer of ~100 nm thickness could be effectively formed on Si substrate by direct Ge ion implantation using the newly-developed PIII&D process for non-gaseous elements.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4A
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• pp.352-360
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• 2008

Recently Task Group (TG) 4 of the Institute of Electrical and Electronics Engineers (IEEE) 802.15a has been recommended a system with ranging capability in existence of multiple Simultaneous operating piconets (SOPs) as well as low-cost, low-power. According to the ranging service, coherent and non-coherent based ranging schemes using ternary code have been adopted as a standard. However it is hard to estimate an accurate time of arrival (TOA) in case of using direct sequence based TOA estimation method because pulse repetition interval (PRI) offered by TG is more limited than the maximum excess delay (MED) of channel. To mitigate inter pulse interference (IPI) problem, this paper proposes a non-coherent TOA estimation scheme using non-periodic transmission (NPT) pattern. The proposed receiver is based on a non-coherent energy detection considering with motivation of low rate wireless personal area network (LR-WPAN). TOA information is estimated via proper comparison with a prescribed threshold after the sliding correlation and search back window (SBW) process for reducing TOA error. To verify the performance of proposed ranging scheme, two distinct channel models approved by IEEE 802.15.4a TG are considered. According to the simulation results, we could conclude that the proposed scheme have performed better performance than the conventional method on the existence of multiple SOPs.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.11
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• pp.2479-2485
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• 2013

In this paper, we present a design for solid-state radar SSPA with sequential bias. We apply to variable extension pulse generator to eliminate signal distortion which is caused by bias rising/falling delay of power amplifier. There is an optimum impedance matching circuit to have high efficiency of GaN-power device by measuring microwave characteristics through load-pull method. The designed SSPA is consisted of pre-amplifier, drive-amplifier and main-amplifier as a three stages to apply for X-Band solid-state radar. Thereby we made a 200W SSPA which has output pulse maximum power shows 53.67dBm and its average power is 52.85dBm. The optimum design of transceiver module for solid-state pulse compression radar which is presented in this dissertation, it can be available to miniaturize and to improve the radar performances through additional research for digital radar from now on.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.880-883
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• 2012

In this paper, CMOS logic device, the INVERTER, NAND, NOR were designed and fabricated using 0.18um CMOS process for analyzing the effect of transient radiation damage. Fabricated logic devices were measured by applying a 1kHz input at 1.8V supply. As a result, the current consumption of less than 70uA and Rising time, Falling time was within a 4us. Experimental results transmission delays occurred when using a 50M cable for pulse radiation experiments.