• The KIPS Transactions:PartD
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• v.10D no.7
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• pp.1189-1196
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• 2003

Owing to the developed If industry, many people are more and more interested in Workflow which is an automated business processing system. In this paper, we present basic structures and various parallel processing structures of a workflow using EMFG (Extended Mark Flow Graph) that makes conceptional design available. And then, We design a workflow with EMFG. We propose the commitability verification method to check whether a workflow can complete or not and the logical bug verification method to find whether invalid components exist or not by using simulation result of it. The proposed EMFG modeling and analysis method for a workflow make it possible to become a visual and formal design. Also, it makes intuitional and mathematical analysis possible.

• Journal of KIISE:Databases
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• v.32 no.1
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• pp.86-99
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• 2005

In this paper, we suggest a system which automatically verifies and tunes transaction processing database applications based on program analysis technology. This system automatically verifies two kinds of transaction processing errors. The first case is the un-closed transaction. In this case, data is not updated as expected or performance of overall system can decrease seriously by locking some database tables until the process terminates. The second case is the miss-use of transaction isolation(inking) level. This causes runtime exception or abnormal termination of the program depending on runtime environment. This system automatically tunes two kinds of inefficient definition of transaction processing which decrease the performance of overall system. The first case happens when opened transaction is closed too late. And the second case happens when transaction isolation level is set too high.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.3
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• pp.555-562
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• 2007

In order to display Bayer input stream received from CMOS image sensor to the display device, image signal processing must be performed. That is, the hardware performing the image signal processing for Bayer data is called ISP(Image Signal Processor). We can see real image through ISP processing. ISP executes functionalities for gamma correction, interpolation, color space conversion, image effect, image scale, AWB, AE and AF. In this paper, we obtained the optimum algorithm through software verification of ISP module for CMOS camera image sensor and described using VHDL and verified in ModelSim6.0a simulator. Also we downloaded into Xilinx XCV-1000e for the designed ISP module and completed the board level verification using PCI interface.

• Journal of the Korean institute of surface engineering
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• v.55 no.6
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• pp.425-432
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• 2022

Antifouling paints that inhibit the attachment and contamination of marine organisms mainly use TBT compounds, but because of their toxic components, they cause ecosystem disturbance and environmental destruction problems, so It is necessary to research eco-friendly antifouling paints that are easy to maintain and effective antifouling technologies. In this study, physical surface treatment of silane coating and chemical antifouling technology were applied to the metal surface to secure the stability of the surface of the marine structure and inhibit the attachment and growth of marine organisms. Adhesion of marine organisms was evaluated according to the coating conditions through surface evaluation of the charged material for 15 months in the waters of the west coast of Korea. In accordance with ASTM D6990-05, antifouling properties fouling rates (FR) and physical degradation rates(PDR) were evaluated through visual inspection of the evaluation specimens. As a result of evaluating the antifouling performance of the coated surface, it was confirmed that the antifouling performance was maintained at the 50% level even after 15 months in the sample subjected to physical processing and silane coating.

• Journal of the Korea Society of Computer and Information
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• v.26 no.5
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• pp.17-22
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• 2021

With the application of the Data 3 method, the scope of the use of pseudonym information has expanded. In the case of pseudonym information, a specific individual can be identified by linking and combining with various data, and personal information may be leaked due to incorrect use of the pseudonym information. In this paper, we propose the scope of use of data is subdivided and a differentiated pseudonym information processing method according to the scope. For the study, the formula was modified by using zero-knowledge proof among the pseudonym information processing methods, and when the proposed formula was applied, it was confirmed that the performance improved by an average of 10% in terms of verification time compared to the case of applying the formula of the existing zero-knowledge proof.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.18 no.8
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• pp.2366-2380
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• 2024

In this study, a high-speed template matching system is proposed for wafer-vision alignment. The proposed system is designed to rapidly locate markers in semiconductor equipment used for wafer-vision alignment. We optimized and implemented a template-matching algorithm for the high-speed processing of high-resolution wafer images. Owing to the simplicity of wafer markers, we removed unnecessary components in the algorithm and designed the system using a field-programmable gate array (FPGA) to implement high-speed processing. The hardware blocks were designed using the Xilinx ZCU104 board, and the pyramid and matching blocks were designed using programmable logic for accelerated operations. To validate the proposed system, we established a verification environment using stage equipment commonly used in industrial settings and reference-software-based validation frameworks. The output results from the FPGA were transmitted to the wafer-alignment controller for system verification. The proposed system reduced the data-processing time by approximately 30% and achieved a level of accuracy in detecting wafer markers that was comparable to that achieved by reference software, with minimal deviation. This system can be used to increase precision and productivity during semiconductor manufacturing processes.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.547-549
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• 2012

In this paper, we propose the verification platform for traffic information of TPEG. Verification platform contains the parsing module of TPEG data and the processing module of GPS data. We compared the traffic information of GPS devices with traffic information of TPEG data. As a result, traffic information from TPEG data is distinguished from actual road traffic information.

• Proceedings of the KSPS conference
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• 2002.11a
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• pp.179-182
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• 2002

The development of noise robust speech processing systems is becoming increasingly important as speech technology is currently widely applied in real world applications. Recently, to resolve such a noise problem, adaptive noise canceller(ANC) is frequently used, which is based upon adaptive filters. The adaptive recursive filters perform better than adaptive non-recursive filters due to the added poles, but the stability may be severely threatened. But these problems of adaptive recursive filters was solved by ACHARF algorithm. This paper presents a method which combines speaker verification system with ANC(Adaptive Noise Canceller) using the ACHARF algorithm. In the front-end stage, ANC is adopted to suppress the additive noise imposed on the speech signal. The results show that the performance of speaker verification system becomes better than before.

• Journal of KIISE:Information Networking
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• v.29 no.5
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• pp.510-523
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• 2002

The routers in an active network perform customized computations on the messages flowing through them, while the role of routers in the traditional packet network, such as the Internet, is to passively forward packets as fast as possible. In contrast to the Internet, the processing in active networks can be customized on a per user or per application basis. Active networks allow users to inject information into the network, where the information describes or controls a program to be executed for the users by the routers as well as the end hosts. So the network users can realize the active networks by "programming" the network behavior via the programming interface exposed to them. In this paper, we devise a network protocol model and present a verification technique for reasoning about the correctness of an active application defined using the model. The technique is developed in a platform- and language-independent way, and it is algorithmic and can be automated by computer program. We give an example dealing with network auction to illustrate the use of the model and the verification technique.

• Proceedings of the IEEK Conference
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• 2000.11c
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• pp.37-40
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• 2000

A fast method of Hangul address word verification is presented in this Paper. Pre-segmentation and recognition by DP matching is adopted in this paper. An address line image is over-segmented by analyzing the topology of connected components and the projection profile. A fast individual Hangul character verifier was developed by applying SVM (Support Vector Machine). The segmentation hypothesis was represented by lattice structure, and a best path search by dynamic programming generates the most probable segmentation path and the final verification score. The word verifier was tested on 310 address image DB, and it show the possibility of improvements of this method.