• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 A
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• pp.368-370
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• 1995

A new three-level push-pull type quantum series resonant rectifier for the power factor correction is proposed. The proposed single phase rectifier enables a zero-current switching operation of all the power devices allowing the circuit to operate at high switching frequencies and high power levels. With the proposed control technique, an unity power factor and greatly reduced line current harmonics can be obtained.

• 전력전자학회논문지
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• 제20권2호
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• pp.182-192
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• 2015

This study develops a digital control scheme with power factor correction for a front-end converter in an electric vehicle battery charger. The front-end converter acts as the boost-type switching-mode rectifier. The converter assumes the two roles of the battery charger, which include power factor control and robust charging performance. The proposed control scheme consists of a charging control algorithm and a grid current control algorithm. The scheme aims to obtain unity input power factor and robust performance. Based on the linear average model of the converter, a constant-current constant-voltage charging control algorithm that passes through only one proportional-integral controller and a current feed-forward path is proposed. In the current control algorithm, we utilized a second band pass filter, a single-phase phase-locked loop technique, and a duty-ratio feed-forward term to control the grid current to be in phase with the grid voltage and achieve pure sinusoidal waveform. Simulations and experiments were conducted to verify the effectiveness of the proposed control scheme, both simulations and experiments.

• Journal of Electrical Engineering and Technology
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• 제5권3호
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• pp.468-476
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• 2010

This paper presents a direct single-stage power converter using single-phase isolated full-bridge converter modules, with inherent power factor correction (PFC) for a 12 kW switched mode power supply (SMPS). The advantages of the proposed converter are its simple control strategy, reduction in number of conversion stage, low input line current harmonics, and improvement in power factor. Analysis of the single-stage converter is carried out in continuous conduction mode of operation. Steady-state analysis of the proposed converter is conducted to obtain converter parameters. A systematic design procedure is also presented for a 12k W converter with a design example. The effect of load variation on SMPS is also studied in order to demonstrate the effectiveness of the proposed converter for the complete range of load conditions. A set of power quality indices on input ac mains for an SMPS fed from a single-stage converter is also presented for easy comparison of their performance.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 전력전자학술대회 논문집
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• pp.149-153
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• 1998

In this paper A switched mode AC/DC three phase boost converter with high power factor and sinusoidal input current waveform is analyzed and simulated. The proposed converter retain high power factor and sinusoidal input current waveform even under electric arc welder load. It is shown that experimental result and simulation waveform yield a sinusoidal input current waveform at high power factor.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.704-708
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• 2004

Recently, many nation have released standard such as IEC 61000-3-2 and IEEE 59, which impose a limit on the harmonic current drawn by equipment connected to AC line in order to prevent the distortion of an AC Line. Therefore, Plasma Display Panel (PDP) which is highlightened in digital display device also has the Power Factor Correction (PFC) circuit to meet the harmonic requirements. In PDP power module, the conventional boost converter is usually used for the PFC circuit. However, it comes serious thermal problem on it's bridge diode due to heat of PDP, and therefore the system stability is not guaranteed. In this paper, the bridgeless boost converter, which is used for PFC circuit of the PDP power module, is designed and verified the possibility of the application in a practical product in a view of efficiency, component count, temperature and etc.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.231-233
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• 2008

본 논문은 전류경계영역(Boundary Conduction Mode:BCM) 역률개선(Power Factor Correction:PFC) 플라이백 Converter의 전류 대신호 모델을 제시하였다. 역률개선 플라이백 Converter의 Small Signal Model을 확립하였으며, 60W급 전원회로의 구현을 통해 제안된 모델링의 유용성을 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.694-700
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• 1998

A novel zero-voltage-transition (ZVT) isolated PWM boost converter for single stage power factor correction (PFC) is presented to improve the performance of the previously presented ZVT converter[8]. A simple auxiliary circuit which includes only one active switch provides zero-voltage-switching (ZVS) condition to all semiconductor devices. (Two active switches are required for the previous ZVT converter) This leads to reduced cost and simplified control circuit comparing to the previous ZVT converter. The ZVS is achieved for wide line and load ranges with minimum device voltage and current stresses. Operation principle, control strategy and features of the proposed converter are presented and verified by the experimental results from a 1.5 kW, 100 KHz laboratory prototype.

• Journal of Power Electronics
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• 제4권1호
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• pp.18-27
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• 2004

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.163-167
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• 2000

This paper presents the digital control of single-phase power factor correction(PFC) converter which has the variable gain according to the condition of inner control loop error. Generally the gain of inner current control loop in single-stage PFC converter has a constant magnitude. This has a bad influence on the power factor because current loop doesn't operate smoothly in the condition that input voltage is low In particular a digital controller has more time delay than an analog controller and degrades This drops the phase margin of the total digital PFC system,. It causes the problem that the gain of current control loop isn't increased enough. In addition the oscillation happens in the peak value of the input voltage open loop PFC system gain changes according to ac input voltage. These aspects make the design of the digital PFC controller difficult The digital PFC controller presented in this paper has a variable gain of current control loop according to input voltage. The 1kW converter was used to verify the efficiency of the digital PFC controller.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.281-286
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• 1998

This paper proposes a new single-stage, single-switch AC/DC converter based on the boost power factor correction (PFC) cell. The converter offers both high power factor and high efficiency. To reduce the dc voltage on the energy storage capacitor, the dc bus voltage feedback method was used. A 100W (5V/20A) prototype was built and tested to show the validity of the proposed converter.