• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.489-490
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• 2006

This paper presents a switch type 2.4/5.8 GHz dual band low-noise amplifier, designed with $0.13{\mu}m$ RF CMOS technology. Using MOS switch allows the LNA to have two different input transconductance and output capacitance modes. Given supply voltage of 1.2 V, the simulation exhibits gains of 8.1 dB and 17.1 dB, noise figures of 3.1 dB and 2.57 dB and power consumptions of 13.0 mW and 10.2 mW at 2.4 GHz and 5.8 GHz, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.4
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• pp.622-629
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• 2001

An engineering model VCO with a good phase noise for Ku-band satellite transponder is designed using a nonlinear design methodology. It generates frequencies from 1,745 and 1,755 MHz with control voltages from 0 to 5 V DC. This unit requires 7 mA of current from 5 V DC supply voltage. Phase noise characteristics of the manufactured VCO exhibit -114 dBc/Hz @10 kHz offset and -131 dBc/Hz @100 kHz of offset and its output power is 5 dBm.

• Journal of IKEEE
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• v.21 no.3
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• pp.264-267
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• 2017

In this paper, A low dropout (LDO) regulator that improves the power supply rejection ratio by using a noise canceling circuit is proposed. The noise rejection circuit between the error amplifier and the pass transistor is designed to reduce the influence of the pass transistor on the noise coming from the voltage source. The LDO regulator has the same regulation characteristics as the conventional LDO regulator. The proposed circuit uses 0.18um process and Cadence's Virtuoso and Specter simulator.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.75-76
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• 2016

This paper proposes a power factor correction circuit with a high efficiency over a wide load range characteristics for a communication power supply. And the characteristic verification is applied to produce a design of prototype. Power factor correction circuit can reduce conduction losses by applying Bridgeless Boost Converter for efficiency. Over a wide load range to maintain the efficient, the control method of a PWM controller is divided by two sections according to the load area. In the low-load region, it was reduced switching losses by applying the critical conduction mode control method. On the other hand, in the heavy-load area, the hysteresis current control method is used to maintain the high efficiency over a wide load range by limiting the peak noise of the inductor.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.36 no.12
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• pp.1207-1215
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• 2008

Satellite generates a complex electromagnetic noise by conducted and radiated coupling effect of the various electrical instruments. This noise may cause serious problems on the satellite system. To minimize the electromagnetic coupling effects and maintain the system safety margin, system noise reduction technique should be applied from the beginning of the system design. The COMS system is evaluated by measuring the conducted noise on system electrical power leads at PSR(Power Supply Regulator) and verifying a 6 dB system safety margin under the complex noise environment with current injection. The radiated noise due to the complex transmit antenna configuration is evaluated by integrating all unit-level RE measurement results, and the RF compatibility between spacecraft and launch vehicle is analyzed with the above estimations. This paper describes the COMS EMC compatibility analysis with respect to each unit level EMC test results, and RF compatibility analysis between spacecraft and launch vehicle. The analyzed results will be reflected on FM(Flight Model) EMC test.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.5
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• pp.51-57
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• 2015

In this paper, in order to design the A / D converter with a high resolution of 14 bits or more for the biological signal processing, CMOS delta sigma modulator that is a 1.8V power supply voltage - were designed. we propose a new structure of The fourth order delta-sigma modulator that needs four op amps but we use only two op amps. By using a time -interleaving technique, we can re-construct the circuit and reuse the op amps. Also, we proposed a KT/C noise reduction circuit to reduce the thermal noise from a noisy resistor. We adjust the size of sampling capacitor between sampling time and integrating time, so we can reduce almost a half of KT/C noise. The measurement results of the chip is fabricated using a Magna 0.18um CMOS n-well1 poly 6 metal process. Power consumption is $828{\mu}W$ from a 1.8V supply voltage. The peak SNDR is measured as a 75.7dB and 81.3dB of DR at 1kHz input frequency and 256kHz sampling frequency. Measurement results show that KT/C noise reduction circuit enhance the 3dB of SNDR. FOM of the circuit is calculated to be 142dB and 41pJ / step.

• Journal of electromagnetic engineering and science
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• v.6 no.2
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• pp.92-97
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• 2006

In this paper, a fully integrated Ku-band tripler differential MMIC voltage controlled oscillator(VCO), which consists of a differential VCO core and two triplers, is developed using high linearity InGaP/GaAs HBT technology. The VCO core generates an oscillation frequency of 3.583 GHz, an output power of 3.65 dBm, and a phase noise of -96.7 dBc/Hz at 100 kHz offset with a current consumption of 30 mA at a supply voltage of 2.9 V. The tripler shows excellent side band rejection of 23 dBc at 3 V and 12 mA. The tripler differential MMIC VCO produces an oscillation frequency of 10.75 GHz, an output power of -13 dBm and a phase noise of -89.35 dBc/Hz at 100 kHz offset.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.57-60
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• 2004

This paper presents multibit Sigma-Delta ADC using Leslie-Singh Structure to Improve nonlinearity of feedback loop. 4-bit flash ADC for multibit Quantization in Sigma Delta modulator offers the following advantages such as lower quantization noise, more accurate white-noise level and more stability over single quantization. For the feedback paths consisting of DAC, the DAC element should have a high matching requirement in order to maintain the linearity performance which can be obtained by the modulator with a multibit quantizer. Thus a Sigma-Delta ADC usually adds the dynamic element matching digital circuit within feedback loop. It occurs complexity of Sigma-Delta Circuit and increase of power dissipation. In this paper using the Leslie-Singh Structure for improving nonliearity of ADC. This structure operate at low oversampling ratio but is difficult to achieve high resolution. So in this paper propose improving loop filter for single-bit feedback multi-bit quantization Sigma-Delta ADC. It obtained 94.3dB signal to noise ratio over 615kHz bandwidth, and 62mW power dissipation at a sampling frequency of 19.6MHz. This Sigma Delta ADC is fabricated in 0.25um CMOS technology with 2.5V supply voltage.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.630-634
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• 2004

This paper describes the design of a two stage 1V power supply SiGe Low Noise Amplifier operating at 5.25 GHa for 802.lla wireless LAN application. The achieved performance includes a gain of 17 ㏈, noise figure of 2.7㏈, reflection coefficient of 15 ㏈, IIP3 of -5 ㏈m, and 1-㏈ compression point of -14㏈m. The total power consumption of the circuit was 7 mW including 0.5mW for the bias circuit.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.2 no.1
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• pp.53-58
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• 2001

The main noise sources in SMPS are divided into three parts: the switching devices, the rectifiers in secondary part, the output transformer and choke coil. In this paper we performed the noise analysis with respect to bobbin type and winding method, and designed an optimized transformer focusing on the transformer. For the comparison. we measured four parameters for each cases, including EMI conducted emission noise. signal from the switching devices, output ripple/noise voltage and leakage current. As the result, the transformer using a vertically-typed bobbin and a parallel, sandwich winding method showed the best performance. We confirmed that the SMPS developed in this research is satisfied with the IEC 601-1 international standard for the medical instrumentation. by testing its electrical characteristics and safety.