• 제목/요약/키워드: Power semiconductor

검색결과 1,981건 처리시간 0.039초

열화된 사이리스터 소자의 임피던스 특성 (A Characteristics on Impedance of Degraded Thyristor with Heat and Voltage Stress)

  • 서길수;김형우;김기현;김남균
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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    • pp.1351-1352
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    • 2006
  • In this paper, the impedance properties of degraded thyristor with heat and voltage were presented. As degraded thyristor, 8 thyristors with each other different reverse blocking voltage used. Its impedance and resistance properties were measured from frequency 100Hz to 10MHz applied with bias voltage from 0V to 40V. As a result, at low frequency region, that is, at the frequency 100-10kHz, the abrupt increasement of its capacitance was confirmed. And also, at high frequency region, the capacitance peak move toward low frequency in the region of frequency 4 - 6MHz as degradation of thyristor.

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전압-열 가속열화에 따른 사이리스터 소자 누설전류 밀 차단전압 특성 분석 (Analysis of the aging effects on the thyristor leakage current and blocking voltage characteristics)

  • 김형우;서길수;김기현;김남균
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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    • pp.1309-1310
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    • 2006
  • 사이리스터 소자의 신뢰성은 HVDC, SVC, FACTs와 같은 대용량 전력 시스템의 신뢰성에 많은 영향을 미친다. 따라서 사이리스터 소자의 신뢰성을 분석하는 것은 시스템의 안정적인 운용과 신뢰성의 확보에 필수적이다. 본 논문에서는 장시간동안 전압 및 열을 인가하여 사이리스터를 가속열화 시켰을 때 사이리스터 소자의 차단전압 및 누설전류 특성의 변화에 대해 실험을 통해 분석하였다. 가속열화 시험에는 14개의 사이리스터가 사용되었고, 1000V, $100^{\circ}C$의 조건에서 가속열화를 진행하였으며, 7일에서 10일의 간격으로 소자의 누설전류 및 차단전압 특성을 측정하여 초기 특성과 비교 분석하였다.

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TCAD Based Power Semiconductor Device e-Learning Tool

  • Landowski, Matthew M.;Shen, Z. John
    • Journal of Power Electronics
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    • 제10권6호
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    • pp.643-646
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    • 2010
  • An interactive web-based teaching tool for a power semiconductor course at the University of Central Florida is presented in this paper. A novel approach is introduced using Technology Aided Design Tools (TCAD) to generate time-lapsed 2D semiconductor device cross-section embedded in a webpage using $Adobe^{(R)}$ Flash (web design tool) platform to create interactive movies that demonstrate complex device physical phenomenon. Students can step through the interactive movies forward, backward, pausing, or looping. Each step represents a giving bias condition. Current-voltage plots are represented along with the semiconductor device and a visual point is placed on the IV curve to indicate the current bias conditions. The changes are then reflected in the 2D cross-section movie area and the IV plot. This tool was implemented in a classroom setting to augment the lectures or for discovery learning.

인버터 모터 드라이브 시스템을 위한 새로운 1200V High Side Driver (Advanced 1200V High Side Driver for Inverter Motor Drive System)

  • 송기남;오원희;최진규;이은영
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2015년도 전력전자학술대회 논문집
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    • pp.487-488
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    • 2015
  • New inverter motor drive systems consume 30%~50% less energy compared to existing motor drive systems. For inverter motor drive systems, the development of a 1200V high side driver is critical. This paper presents an advanced 1200V high side driver with low power consumption and high ruggedness. This solution implements a high voltage level shifter which consumes low power by adding a clamped VGS LDMOS driver to the conventional short pulse generator. Moreover, this paper proposes a highly rugged 1200V LDMOS which improves SOA by limiting the hole current. This paper could be applied to smart power modules used for HVAC (heating, ventilation, and airconditioning) and industrial inverters. Consequently, this paper will provide design engineers with an understanding of how they can make a significant contribution to worldwide energy savings.

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Step doping 농도를 가지는 SOI RESURF LDMOSFET의 전기적 특성 분석 (Electrical characteristics of the SOI RESURF LDMOSFET with step doped epi-layer)

  • 김형우;서길수;김지홍;김남균
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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    • pp.361-364
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    • 2004
  • Surface doped SOI RESURF LDMOSFET with recessed source region is proposed to improve the on- and off-state characteristics. Surface region of the proposed LDMOS structure is doped like step. The characteristics of the proposed LDMOS is verified by two-dimensional process simulator ATHENA and device simulator ATLAS[1]. The numerically calculated on-resistance($R_{ON}$) of the proposed LDMOS is $10.36\Omega-cm$ and breakdown voltage is 205V when $L_{dr}=7{\mu}m$ with step doped surface.

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Multi result MOSFET의 에피층 농도에 따른 전기적 특성분석 (Electrical characteristics of the multi-result MOSFET)

  • 김형우;김상철;서길수;김은동
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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    • pp.365-368
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    • 2004
  • Charge compensation effects in multi-resurf structure make possible to obtain high breakdown volatage and low on-resistance in vertical MOSFET. In this paper, electrical characteristics of the vertical MOSFET with multi epitaxial layer is presented. Proposed device has n and p-pillar for obtaining the charge compensation effects and The doping concentration each pillar is varied from $5{\times}10^{14}\;to\;1{\times}10^{16}/cm^3$. The thickness of the proposed device also varied from $400{\mu}m\;to\;500{\mu}m$. Due to the charge compensation effects, 4500V of breakdown voltage can be obtained.

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Effects of Electrostatic Discharge Stress on Current-Voltage and Reverse Recovery Time of Fast Power Diode

  • Bouangeune, Daoheung;Choi, Sang-Sik;Cho, Deok-Ho;Shim, Kyu-Hwan;Chang, Sung-Yong;Leem, See-Jong;Choi, Chel-Jong
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권4호
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    • pp.495-502
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    • 2014
  • Fast recovery diodes (FRDs) were developed using the $p^{{+}{+}}/n^-/n^{{+}{+}}$ epitaxial layers grown by low temperature epitaxy technology. We investigated the effect of electrostatic discharge (ESD) stresses on their electrical and switching properties using current-voltage (I-V) and reverse recovery time analyses. The FRDs presented a high breakdown voltage, >450 V, and a low reverse leakage current, < $10^{-9}$ A. From the temperature dependence of thermal activation energy, the reverse leakage current was dominated by thermal generation-recombination and diffusion, respectively, at low and high temperature regions. By virtue of the abrupt junction and the Pt drive-in for the controlling of carrier lifetime, the soft reverse recovery behavior could be obtained along with a well-controlled reverse recovery time of 21.12 ns. The FRDs exhibited excellent ESD robustness with negligible degradations in the I-V and the reverse recovery characteristics up to ${\pm}5.5$ kV of HBM and ${\pm}3.5$ kV of IEC61000-4-2 shocks. Likewise, transmission line pulse (TLP) analysis reveals that the FRDs can handle the maximum peak pulse current, $I_{pp,max}$, up to 30 A in the forward mode and down to - 24 A in the reverse mode. The robust ESD property can improve the long term reliability of various power applications such as automobile and switching mode power supply.

Power Line Communication을 이용한 반도체 Plasma 장비 전력시스템 원격제어 (The Electric Power System Remote Control Of Semiconductor Plasma Manufacturing Equipment Using Power Line Communication)

  • 이내일;김진환
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.1678-1679
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    • 2007
  • This paper is the electric power system remote control of semiconductor plasma manufacturing equipment using PLC(power line communication). PLC is useful for economical data link but various problems and limitations are caused in using power lines for communications channel Develop of Semiconductor plasma manufactur ing equipment and remote automation technologies of tool develops day after day and standards. Also, Remote electric power control and device module control by GUIRCS(Graphic User Interface Remote Control System) of tool are monitoring in real time.

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A Study on the Power Loss Simulation of IGBT for HVDC Power Conversion System

  • Cho, Su Eog
    • 한국산업융합학회 논문집
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    • 제24권4_1호
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    • pp.411-419
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    • 2021
  • In this study, IGBT_Total_Loss and DIODE_Total_Loss were used to analyze the slope of the junction temperature for each section for temperature and duty variables in order to simply calculate the junction temperature of the power semiconductor (IGBT). As a result of the calculation, IGBT_Max_Junction_Temp and DIODE_Max_Junction_Temp form a proportional relationship with temperature for each duty. This simulation data shows that the power loss of a power semiconductor is calculated in a complex manner according to the current dependence index, voltage dependence index, and temperature coefficient. By applying the slope for each condition and section, the junction temperature of the power semiconductor can be calculated simply.

Wide Band-gap FETs for High Power Amplifiers

  • Burm, Jin-Wook;Kim, Jae-Kwon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권3호
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    • pp.175-181
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    • 2006
  • Wide band-gap semiconductor electron devices have made great progresses to produce very high power amplifiers for various wireless standards. The advantages of wide band-gap electronic devices and their progresses are summarized in this paper.