• Title/Summary/Keyword: Power consumption

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A Frequency Selection Algorithm for Power Consumption Minimization of Processor in Mobile System (이동형 시스템에서 프로세서의 전력 소모 최소화를 위한 주파수 선택 알고리즘)

  • Kim, Jae Jin;Kang, Jin Gu;Hur, Hwa Ra;Yun, Choong Mo
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.4 no.1
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    • pp.9-16
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    • 2008
  • This paper presents a frequency selection algorithm for minimization power consumption of processor in Mobile System. The proposed algorithm has processor designed low power processor using clock gating method. Clock gating method has improved the power dissipation by control main clock through the bus which is embedded clock block applying the method of clock gating. Proposed method has compared power consumption considered the dynamic power for processor, selected frequency has considered energy gain and energy consumption for designed processor. Or reduced power consumption with decreased processor speed using slack time. This technique has improved the life time of the mobile systems by clock gating method, considered energy and using slack time. As an results, the proposed algorithm reduce average power saving up to 4% comparing to not apply processor in mobile system.

Investigation of Power Saving Efficiency for the OFDM Based Multimedia Communication Terminal (OFDM 기반 광대역 멀티미디어 단말의 전력절감 효율 분석에 관한 연구)

  • Moon, Jae-Pil;Lee, Eun-Seo;Kim, Dong-Hwan;Lee, Jae-Sik;Chang, Tae-Gyu
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.155-158
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    • 2005
  • An invesitigation on power consumption of a mobile multimedia system using OFDM and MDVS technique is reported here. Analysis and simulation are performed to find the significances of proposed Microscopic Dynamic Voltage Scaling(MDVS) tehnique[4] on digital processor in terms of power saving. A study is also made to show power reduction in mobile multimedia system by incorporating OFDM modulation scheme in RF front-end. Finally, overall power consumption by functionally distinguished blocks ie. RF front-end, digital processor and human interface unit is shown here. Total power consumption is 8.2W for 2Mbps SD-quality WCDMA multimedia video service - the power consumption of digital processor is 3.9W(48%), the power consumption of RF front-end is 3.2W (36%), and the power consumption of interface is 1.8W(16%). Power saving of applying purposed MDVS technique is 35% in digital processor, and power saving of OFDM technique is 10-12dB in RF front-end.

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An Effective Viewport Resolution Scaling Technique to Reduce the Power Consumption in Mobile GPUs

  • Hwang, Imjae;Kwon, Hyuck-Joo;Chang, Ji-Hye;Lim, Yeongkyu;Kim, Cheong Ghil;Park, Woo-Chan
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.8
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    • pp.3918-3934
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    • 2017
  • This paper presents a viewport resolution scaling technique to reduce power consumption in mobile graphic processing units (GPUs). This technique controls the rendering resolution of applications in proportion to the resolution factor. In the mobile environment, it is essential to find an effective resolution factor to achieve low power consumption because both the resolution and power consumption of a GPU are in mutual trade-off. This paper presents a resolution factor that can minimize image quality degradation and gain power reduction. For this purpose, software and hardware viewport resolution scaling techniques are applied in the Android environment. Then, the correlation between image quality and power consumption is analyzed according to the resolution factor by conducting a benchmark analysis in the real commercial environment. Experimental results show that the power consumption decreased by 36.96% on average by the hardware viewport resolution scaling technique.

Calculation of Photovoltaic, ESS Optimal Capacity and Its Economic Effect Analysis by Considering University Building Power Consumption (대학건물의 전력소비패턴 분석을 통한 태양광, ESS 적정용량 산정 및 경제적 효과 분석)

  • Lee, Hye-Jin;Choi, Jeong-Won
    • Journal of the Korean Society of Industry Convergence
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    • v.21 no.5
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    • pp.207-217
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    • 2018
  • Recently, the importance of energy demand management, particularly peak load control, has been increasing due to the policy changes of the Second Energy Basic Plan. Even though the installation of distributed generation systems such as Photovoltaic and energy storage systems (ESS) are encouraged, high initial installation costs make it difficult to expand their supply. In this study, the power consumption of a university building was measured in real time and the measured power consumption data was used to calculate the optimal installation capacity of the Photovoltaic and ESS, respectively. In order to calculate the optimal capacity, it is necessary to analyze the operation methods of the Photovoltaic and ESS while considering the KEPCO electricity billing system, power consumption patterns of the building, installation costs of the Photovoltaic and ESS, estimated savings on electric charges, and life time. In this study, the power consumption of the university building with a daily power consumption of approximately 200kWh and a peak power of approximately 20kW was measured per minute. An economic analysis conducted using these measured data showed that the optimal capacity was approximately 30kW for Photovoltaic and approximately 7kWh for ESS.

A Study of FPGA Modul Algorithm consider the Power Consumption for Digital Technology (디지털 기술의 소모전력을 위한 FPGA 모듈 알고리즘에 관한연구)

  • Youn, Choong-Mo;Kim, Jae-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.9
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    • pp.1851-1857
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    • 2009
  • In this paper, reuse module generation algorithm consider the power consumption for FPGA technology mapping is proposed. To proposed algorithm is RT library generating algorithm consider power consumption for reuse module using FPGA technology mapping. In the first, selected FPGA for power consumption calculation. Technology mapping process have minimum total power consumption consider LUT's constraint in selected FPGA. A circuit into device by selected proper modules of allocation result for power consumption constraint using data.

A Study of Reuse Module Generation Algorithm consider the Power Consumption for FPGA Technology Mapping (FPGA 기술 매핑을 위한 소모 전력을 고려한 재사용 모듈 생성 알고리즘에 관한 연구)

  • Youn, Choong-Mo;Kim, Jae-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.12
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    • pp.2306-2310
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    • 2007
  • In this paper, reuse module generation algorithm consider the power consumption for FPGA technology mapping is proposed. To proposed algorithm is RT library generating algorithm, consider power consumption for reuse module using FPGA technology mapping. In the first, selected FPGA for power consumption calculation. Technology mapping process have minimum total power consumption consider LUT's constraint in selected FPGA. A circuit into device by selected proper modules of allocation result for power consumption constraint using data.

A Dynamic Zigbee Protocol for Reducing Power Consumption

  • Kwon, Do-Keun;Chung, Ki Hyun;Choi, Kyunghee
    • Journal of Information Processing Systems
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    • v.9 no.1
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    • pp.41-52
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    • 2013
  • One of the obstacles preventing the Zigbee protocol from being widely used is the excessive power consumption of Zigbee devices in low bandwidth and low power requirement applications. This paper proposes a protocol that resolves the power efficiency problem. The proposed protocol reduces the power consumption of Zigbee devices in beacon-enabled networks without increasing the time taken by Zigbee peripherals to communicate with their coordinator. The proposed protocol utilizes a beacon control mechanism called a "sleep pattern," which is updated based on the previous event statistics. It determines exactly when Zigbee peripherals wake up or sleep. A simulation of the proposed protocol using realistic parameters and an experiment using commercial products yielded similar results, demonstrating that the protocol may be a solution to reduce the power consumption of Zigbee devices.

Electric railway power rates inspection program and method to decrease peak energy consumption (전철변전소 전력요금 계산 프로그램 및 피크전력 저감방안)

  • Jeon, Yong-Joo;Ryu, Young-Tae;Park, Ki-Bum;Lee, Tea-Hoon;Lee, Gi-Chun
    • Proceedings of the KSR Conference
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    • 2007.11a
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    • pp.1511-1514
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    • 2007
  • KORAIL is one of the biggest consumer in electric power market so it is necessary to investigate power consumption pattern and optimize power rates. This paper presents simulation program for electric power rates define program based on billing system database. Base on the substation annual power usage DB data, the characteristic of the substation power consumption are investigated and effective electrical billing system are compared each other. Through this program it is verified that we can save more then several hundred million won for a year. Also electric train air condition power consumption was measured to figure the method how to reduce peak energy consumption.

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Wireless Power Transfer via Magnetic Resonance Coupling (MRC) with Reduced Standby Power Consumption

  • Lee, Byoung-Hee
    • Journal of Power Electronics
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    • v.19 no.3
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    • pp.637-644
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    • 2019
  • Wireless power transfer (WPT) technology with various transfer mechanisms such as inductive coupling, magnetic resonance and capacitive coupling is being widely researched. Until now, power transfer efficiency (PTE) and power transfer capability (PTC) have been the primary concerns for designing and developing WPT systems. Therefore, a lot of studies have been documented to improve PTE and PTC. However, power consumption in the standby mode, also defined as the no-load mode, has been rarely studied. Recently, since the number of WPT products has been gradually increasing, it is necessary to develop techniques for reducing the standby power consumption of WPT systems. This paper investigates the standby power consumption of commercial WPT products. Moreover, a standby power reduction technique for WPT systems via magnetic resonance coupling (MRC) with a parallel resonance type resonator is proposed. To achieve a further standby power reduction, the voltage control of an AC/DC travel adapter is also adopted. The operational principles and characteristics are described and verified with simulation and experimental results. The proposed method greatly reduces the standby power consumption of a WPT system via MRC from 2.03 W to 0.19 W.

Power Consumption Prediction Scheme Based on Deep Learning for Powerline Communication Systems (전력선통신 시스템을 위한 딥 러닝 기반 전력량 예측 기법)

  • Lee, Dong Gu;Kim, Soo Hyun;Jung, Ho Chul;Sun, Young Ghyu;Sim, Issac;Hwang, Yu Min;Kim, Jin Young
    • Journal of IKEEE
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    • v.22 no.3
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    • pp.822-828
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    • 2018
  • Recently, energy issues such as massive blackout due to increase in power consumption have been emerged, and it is necessary to improve the accuracy of prediction of power consumption as a solution for these problems. In this study, we investigate the difference between the actual power consumption and the predicted power consumption through the deep learning- based power consumption forecasting experiment, and the possibility of adjusting the power reserve ratio. In this paper, the prediction of the power consumption based on the deep learning can be used as a basis to reduce the power reserve ratio so as not to excessively produce extra power. The deep learning method used in this paper uses a learning model of long-short-term-memory (LSTM) structure that processes time series data. In the computer simulation, the generated power consumption data was learned, and the power consumption was predicted based on the learned model. We calculate the error between the actual and predicted power consumption amount, resulting in an error rate of 21.37%. Considering the recent power reserve ratio of 45.9%, it is possible to reduce the reserve ratio by 20% when applying the power consumption prediction algorithm proposed in this study.