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http://dx.doi.org/10.6109/jkiice.2007.11.12.2306

A Study of Reuse Module Generation Algorithm consider the Power Consumption for FPGA Technology Mapping  

Youn, Choong-Mo (서일대학 정보전자과)
Kim, Jae-Jin (극동정보대학 컴퓨터정보과)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.11, no.12, 2007 , pp. 2306-2310 More about this Journal
Abstract
In this paper, reuse module generation algorithm consider the power consumption for FPGA technology mapping is proposed. To proposed algorithm is RT library generating algorithm, consider power consumption for reuse module using FPGA technology mapping. In the first, selected FPGA for power consumption calculation. Technology mapping process have minimum total power consumption consider LUT's constraint in selected FPGA. A circuit into device by selected proper modules of allocation result for power consumption constraint using data.
Keywords
FPGA;
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