• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 B
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• pp.623-627
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• 1995

This paper describes analysis and optimization of Weil-Dobke synthetic testing circuit parameters, which is efficient and economical test method in high capacity AC circuit breaker. In this paper, analysis of synthetic short-circuit test circuit parameter proposed nondimensional factor that is reciprocal comparison value of circuit parameter and is not related to rated of circuit breaker, in particular, this study induce minimization of required energy of critical TRV generation specified in IEC 56 standards and present optimal design of synthetic short circuit testing facilities.

• 전력전자학회논문지
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• 제4권2호
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• pp.122-127
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• 1999

본 논문에서는 3마력의 컴프레샤 모터를 갖는 대용량의 인버터 에어컨의 원가절감과 성능향상을 위해서 병렬구동방식을 사용한 역률제어회로를 제안하였다. 역률개선 LC필터를 제거하고 출력캐패시터와 인버터 스위치의 정격축소를 통해서 재료비를 줄이기 위해서 적절한 설계절차를 제시하였다. 이렇게 결정된 소자를 사용하여 6[kW] 소지전력을 갖는 프로토형 회로를 구성하고 제안된 회로의 동작을 확인하기 위해서 실험을 하였다.

• 한국조명전기설비학회지:조명전기설비
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• 제11권6호
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• pp.90-95
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• 1997

고주파 유도가열을 위한 인버터의 공진회로 설계에서 인덕턴스 L의 작용과, 출력전달 요소로 사용된 변압기의 결합계수, 그리고 코일을 사용한 가열부하의 결합계수가 공진회로의 출력, 회로의 Q와 공진주파수에 큰 영향을 주고 있음을 등가회로를 도출하여 그 특성을 해석하였다. 또한 변압기를 테브난 등가회로로 구성할 경우, 변압기의 이차측 임피던스를 일차측 임피던스고 환산하면, 권선비 n$^2$에 비례 할 뿐만 아니라 결합계수 $K^2$에도 비례함을 도출하여 결합계수형 테브난 등가회로에 의한 정확성이 큰 인버터 공진회로 설계의 기초방식을 나타냈다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.909-912
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• 2005

According to miniaturization trend of rehabilitation medical equipment such as hearing aid, study to replace previous complex system with semiconductor SOC (System-on-Chip) chip becomes lively. In this study, after investigating of existent hearing aid performance in circuit design approach, low electric power consuming, single power supply (1.4V battery) CMOSS OP AMP was designed. Analog circuit design tools such as Hspice and Cadence were used for circuit simulation and implementing layout design. This study shows technical methods particularly for layout design. The work is done in pmos and nmos active element layout design in addition to passive element design such as resister, capacitor and inductor.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.919-922
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• 2003

This paper presents a novel low power driving circuit for passive matrix organic lighting emitting diodes (OLED) displays. The proposed driving method for a low power OLED driving circuit which reduce large parasitic capacitance in OLED panel only use current driving method, instead of mixed mode driving method which uses voltage pre-charge technique. The driving circuit is implemented to one chip using 0.35${\mu}{\textrm}{m}$ CMOS process with 18V high voltage devices and it is applicable to 96(R.G.B)X64, 65K color OLED displays for mobile phone application. The maximum switching power dissipation of driving power dissipation is 5.7mW and it is 4% of that of the conventional driving circuit.

• Journal of Power Electronics
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• 제15권4호
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• pp.1074-1084
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• 2015

These days, the widespread use of sensitive loads and distributed generators makes the solid-state circuit breaker (SSCB) an essential component in power circuits to achieve a high power quality for AC Grids. In traditional AC SSCB using SCRs, some auxiliary mechanical devices are required to make the reclosing operation possible before fault recovery. However, the proposed AC SSCB can break quickly and then be reclosed without auxiliary mechanical devices even during the short-circuit fault. Moreover, its fault current breaking time is short and its SSCB reclosing operation is fast. This results in a reduction of the economic losses due to fault currents and power outages. Through simulations and experiments on short-circuit faults, the performance characteristics of the proposed AC SSCB are verified. A design guideline is also suggested to apply the proposed AC SSCB to various AC grids.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2001년도 춘계학술대회논문집B
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• pp.476-481
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• 2001

In this paper, based on the developed dynamic model of a vacuum circuit breaker mechanism, the development of the new circuit breaker with less energy mechanism is focused. The energy flow analysis of the original mechanism is carried out to show where the elastic potential energies of pre-loaded springs are transmitted. Through energy flow analysis, the concept design of the new circuit breaker with less energy mechanism is proposed, and then the detailed design is carried out through the design process based on the verified dynamic model. Comparing simulation results with experiment using a high-speed camera, the appropriateness of the proposed design procedures for the rapid circuit breaker mechanism is shown.

• 한국항행학회논문지
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• 제24권2호
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• pp.107-114
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• 2020

2.4 GHz ISM대역 전력증폭기를 설계하고 송신 시스템을 구현하였다. 고효율 증폭기는 E급이나 F급 증폭기로 구현 가능하다. 본 연구에서는 회로 구조가 간단한 E급으로 20 W 급 고효율 증폭기를 설계하여 ISM 대역 응용에 적용하도록 하였다. E급 회로 설계이론 및 회로 시뮬레이션을 통해 임피던스 정합회로를 설계하였으며 2.45 GHz에서 출력전력 44.2 dBm 및 전력부가효율 69%를 얻었다. 설계된 전력증폭기에 30 dBm의 입력전력을 인가하기 위하여 앞단에 전압제어발진기와 구동증폭기를 제작하여 입력전력 공급회로를 구현하였고, 제작한 전력증폭기는 43.2 dBm 출력 및 65%의 전력부가효율 특성을 나타내었다. 본 연구결과는 무선전력전송, 전파차단장치, 고출력 송신장치 등 다양한 무선통신시스템용 출력 전력증폭기 설계에 활용될 수 있다.

• 전자공학회논문지B
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• 제32B권5호
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• pp.730-736
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• 1995

This paper presents the design of a CMOS programmable slew rate operational amplifier based upon a newly proposed concept, that is a switched parallel current subtraction circuit with adaptive biasing technique. By utilizing the newly designed circuit, it was proven that slew rate was linearly controlled and power dissipation was optimized. If the programmable slew rate amplifier is employed into mixed signal system, it can furnish the convenience of timing control and optimized power dissipation. Simulated data showed the slew rate ranging from 5. 83V/$\mu$s to 41.4V/$\mu$s, power dissipation ranging from 1.13mW to 4.1mW, and the other circuit performance parameters were proven to be comparable with those of a conventional operational amplifier.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권3호
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• pp.380-386
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• 2016

This paper presents a compact and low-power on-chip touch sensor and readout circuit using shunt proximity touch sensor and its design scheme. In the proposed touch sensor readout circuit, the touch panel condition depending on the proximity of the finger is directly converted into the corresponding voltage level without additional signal conditioning procedures. Furthermore, the additional circuitry including the comparator and the flip-flop does not consume any static current, which leads to a low-power design scheme. A new prototype touch sensor readout integrated circuit was fabricated using complementally metal oxide silicon (CMOS) $0.18{\mu}m$ technology with core area of $0.032mm^2$ and total current of $125{\mu}A$. Our measurement result shows that an actual 10.4 inches capacitive type touch screen panel (TSP) can detect the finger size from 0 to 1.52 mm, sharply.