• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.9-12
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• 1998

In this paper, the power factor correction circuit using a parallel drive method is proposed so that the high power inverter air-conditioner with 3[ph] compressor motor may obtain the cost down and the improved performance. The adequate design procedures are presented to reduce the material costs by eliminating the power factor improving LC filter and derating output capacitor and inverter switches. Using the determined components, the prototype circuit with 6[kW] power consumption is built and tested to verify the operation of the proposed circuit.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.11B no.3
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• pp.112-118
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• 2001

In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

• Transactions of the Korean hydrogen and new energy society
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• v.33 no.3
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• pp.226-231
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• 2022

Power converter are usually equipped for fuel cell power generation system to connect alternating current (AC) electric power grid. When converting direct current (DC) of fuel cell power source into AC, the power converter has a frequency ripple, which affects the fuel cell and the grid. Therefore, an equivalent circuit having dynamic characteristics of fuel cell power, for example, impedance, is useful for designing an inverter circuit. In this study, the current, voltage and impedance characteristics were calculated through fuel cell modeling and validated by comparing them with experiments. The equivalent circuit element values according to the current density were formulated into equations so that it could be applied to the circuit design. It is expected that the process of the equivalent circuit modeling will be applied to the actual inverter circuit design and simulated fuel cell power sources.

• The Journal of the Korea institute of electronic communication sciences
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• v.15 no.2
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• pp.357-362
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• 2020

The TMFT, a sub-system of TINC, provides voice calls, data transmission and reception, and multimedia services to individual users. At the time of development in 2011, the power circuit of the TMFT was designed to electrical power supply to each device via a charger IC. However, the newly improved power supply circuit allows power to be supplied to each device through the PMIC without configuring the charger IC separately. In this paper, the power circuit design structure of TMFT applied in the development stage and the improved power circuit design structure were compared. And we verified through experiments whether the improved power circuit can be applied to TMFT. The experimental method was verified by directly comparing the current consumption test, charge time comparison test, and rising temperature test during charging each of before and after improvement terminals.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.5
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• pp.389-394
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• 2015

This paper proposes a series-connected power conversion system that integrates a photovoltaic power conditioner and a charge-balancing circuit. In conventional methods, a photovoltaic power conditioner and a cell-balancing circuit are needed for photovoltaic systems with energy storage devices, which results in a complex configuration and high cost. To overcome these problems, a series-connected DC-DC power conditioning system that integrates a photovoltaic power conditioner with a charge-balancing circuit is proposed. During the generation, the system operates as power conditioner only, whereas it operates as a cell balancing circuit during the rest time. For the analysis, the operating principle of the circuit and the controller design are done by PSIM simulation. For verification, a hardware prototype with 48-W photovoltaic modules has been implemented. Results verified that the modularized photovoltaic power conversion system with a series-connected storage successfully works with the proposed method.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.1139-1140
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• 2008

This paper is designated to introduce the method of reducing stand-by Power of SMPS applied PLC(Power Line Communication) and its implementation. PLC modem consists mainly of PLC Module, Coupling Circuit, ZCP(Zero-Cross Point) Circuit and Power Supply Circuit. By controlling power from Power Supply Circuit to PLC Module and ZCP Circuit, the reduction of Stand-by Power is established. When this method is applied to SMPS used for a low-speed PLC, about 50% power reduction is provided, compared to the other case to which it is not applied.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.179-182
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• 2000

Adiabatic dynamic CMOS logic circuits, which are called ADCL circuits, promise us to implement low power logic circuits. Since the power supply source for ADCL circuits had not been developed, we proposed a power supply circuit for them. It is shown experimentally that by using the power supply circuit ADCL circuits can work with lower power consumption than conventional static CMOS circuit. In this paper, the power supply circuit is improved so that the power consumption can be reduced. Also, it is shown by some experiments that by using the circuit, ADCL circuits can work with lower power consumption than before Improving.

• Journal of information and communication convergence engineering
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• v.9 no.3
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• pp.301-304
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• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, 0.35${\mu}$m standard CMOS process, 40MHz condition. The result shows about 27% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.692-695
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• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 35% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.10
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• pp.43-46
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• 2012

In this paper, high efficiency power amplifier is implemented with high gain amplifier. Two-stage amplifier using adaptive bias control circuit improve efficiency at low input power. Fixed bias circuit and adaptive bias circuit both have about 76 % efficiency at maximum power level. However amplifier using an adaptive bias control circuit has 70 % at 6 dBm input power level when the amplifier using fixed bias circuit has 50%. The proposed power amplifier using the adaptive bias control circuit can have high efficiency at lower power level.