• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.4 s.346
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• pp.8-15
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• 2006

In this paper, the 94 GHz, low conversion loss, and high isolation single balanced mixer is designed and fabricated using GaAs-based metamorphic high electron mobility transistors (MHEMTs) with 70 nm gate length and the hybrid ring coupler with the micromachined transmission lines, dielectric-supported air-gapped microstrip lines (DAMLs). The 70 nm MHEMT devices exhibit DC characteristics with a drain current density of 607 mA/mm an extrinsic transconductance of 1015 mS/mm. The current gain cutoff frequency ($f_T$) and maximum oscillation frequency ($f_{max}$) are 320 GHz and 430 GHz, respectively. The fabricated hybrid ring coupler shows wideband characteristics of the coupling loss of $3.57{\pm}0.22dB$ and the transmission loss of $3.80{\pm}0.08dB$ in the measured frequency range of 85 GHz to 105 GHz. This mixer shows that the conversion loss and isolation characteristics are $2.5dB{\sim}>2.8dB$ and under -30 dB, respectively, in the range of $93.65GHz{\sim}94.25GHz$. At the center frequency of 94 GHz, this mixer shows the minimum conversion loss of 2.5 dB at a LO power of 6 dBm To our knowledge, these results are the best performances demonstrated from 94 GHz single balanced mixer utilizing GaAs-based HEMTs in terms of conversion loss as well as isolation characteristics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.62-68
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• 2010

This work proposes a 10b 100MS/s DAC based on a segmented local matching technique primarily for small chip area. The proposed DAC employing a segmented current-steering structure shows the required high linearity even with the small number of devices and demonstrates a fast settling behavior at resistive loads. The proposed segmented local matching technique reduces the number of current cells to be matched and the size of MOS transistors while a double-cascode topology of current cells achieves a high output impedance even with minimum sized devices. The prototype DAC implemented in a 0.13um CMOS technology occupies a die area of $0.13mm^2$ and drives a $50{\Omega}$ load resistor with a full-scale single output voltage of $1.0V_{p-p}$ at a 3.3V power supply. The measured DNL and INL are within 0.73LSB and 0.76LSB, respectively. The maximum measured SFDR is 58.6dB at a 100MS/s conversion rate.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.11
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• pp.63-70
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• 2001

We demonstrate the MMIC (monolithic microwave integrated circuit) frequency doublers generating stable and low-cost 29 GHz local oscillator signals from 14.5 GHz input signals. These devices were designed and fabricated by using the M MIC integration process of $0.1\;{\mu}m$ gate-length PHEMTs (pseudomorphic high electron mobility transistors) and passive components. The measurements showed S11 or -9.2 dB at 145 GHz, S22 of -18.6 dG at 29 GHz and a minimum conversion loss of 18.2 dB at 14.5 GHz with an input power or 6 dBm. Fundamental signal of 14.5 GHz were suppressed below 15.2 dBe compared to the second harmonic signal at the output port, and the isolation characteristics of fundamental signal between the input and the output port were maintained above :i0 dB in the frequency range 10.5 GHz to 18.5 GHz. The chip size of the fabricated MMIC frequency doubler is $1.5{\times}2.2\;mm^2$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.5
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• pp.40-49
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• 2008

A Frequency synthesizer for mobile-DTV applications is implemented using $0.18{\mu}m$ CMOS process with 1.8V supply. PMOS transistors are chosen for VCO core to reduce phase noise. The measurement result of VCO frequency range is 800MHz-1.67GHz using switchable inductors, capacitors and varactors. We use varactor bias technique for the improvement of VCO gain linearity, and the number of varactor biasing are minimized as two. VCO gain deterioration is also improved by using the varactor switching technique. The VCO gain and interval of VCO gain are maintained as low and improved using the VCO frequency calibration block. The sigma-delta modulator for fractional divider is designed by the co-simualtion method for accuracy and efficiency improvement. The VCO, PFD, CP and LF are verified by Cadence Spectre, and the sigma-delta modulator is simulated using Matlab Simulink, ModelSim and HSPICE. The power consumption of the frequency synthesizer is 18mW, and the VCO has 52.1% tuning range according to the VCO maximum output frequency. The VCO phase noise is lower than -100dBc/Hz at 1MHz at 1MHz offset for 1GHz, 1.5GHz, and 2GHz output frequencies.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

• Journal of Sensor Science and Technology
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• v.7 no.1
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• pp.31-38
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• 1998

Multi-channel sensors can be used to increase the reliability and remove the random iloise in ion-sensitive field effect transistors(ISFETs). Multi-channel sensors is also an essential step toward potential fabrication of sensors for several ionic species in one device. However, when the multi-channel sensors are separately biased, the biasing problems become difficult, that is to say, the bias circuit is needed as many sensors. In this work, a circuit for biasing the four pH-ISFETs in null-balance method, where bias voltages are switched, was proposed. The proposed concept is need only one bias circuit for the four sensors. Therefore it has advantages of smaller size and lower power consumption than the case that all sensors are separately biased at a time. The proposed circuit was tested with discrete devices and its performance was investigated. In the recent trend, sensor systems are implemented as portable systems. So the verified measurement circuit was integrated by using the CMOS circuit. Fortunately, ISFET fabrication process can be compatible with CMOS process. Full circuit has a mask area of $660{\mu}m{\times}500{\mu}m$. In the future, this step will be used for developing the smart sensor system with ISFET.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.68.1-68.1
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• 2012

The best part of graphene is - charge-carriers in it are mass less particles which move in near relativistic speeds. Comparing to other materials, electrons in graphene travel much faster - at speeds of $10^8cm/s$. A graphene sheet is pure enough to ensure that electrons can travel a fair distance before colliding. Electronic devices few nanometers long that would be able to transmit charge at breath taking speeds for a fraction of power compared to present day CMOS transistors. Many researches try to check a possibility to make it a perfect replacement for silicon based devices. Graphene has shown high potential to be used as interconnects in the field of high frequency electrical devices. With all those advantages of graphene, we demonstrate characteristics of electrical and optical properties of graphene such as the effect of graphene geometry on the microwave properties using the measurements of S-parameter in range of 500 MHz - 40 GHz at room temperature condition. We confirm that impedance and resistance decrease with increasing the number of graphene layer and w/L ratio. This result shows proper geometry of graphene to be used as high frequency interconnects. This study also presents the optical properties of graphene oxide (GO), which were deposited in different substrate, or influenced by oxygen plasma, were confirmed using different characterization techniques. 4-6 layers of the polycrystalline GO layers, which were confirmed by High resolution transmission electron microscopy (HRTEM) and electron diffraction analysis, were shown short range order of crystallization by the substrate as well as interlayer effect with an increase in interplanar spacing, which can be attributed to the presence of oxygen functional groups on its layers. X-ray photoelectron Spectroscopy (XPS) and Raman spectroscopy confirms the presence of the $sp^2$ and $sp^3$ hybridization due to the disordered crystal structures of the carbon atoms results from oxidation, and Fourier Transform Infrared spectroscopy (FTIR) and XPS analysis shows the changes in oxygen functional groups with nature of substrate. Moreover, the photoluminescent (PL) peak emission wavelength varies with substrate and the broad energy level distribution produces excitation dependent PL emission in a broad wavelength ranging from 400 to 650 nm. The structural and optical properties of oxygen plasma treated GO films for possible optoelectronic applications were also investigated using various characterization techniques. HRTEM and electron diffraction analysis confirmed that the oxygen plasma treatment results short range order crystallization in GO films with an increase in interplanar spacing, which can be attributed to the presence of oxygen functional groups. In addition, Electron energy loss spectroscopy (EELS) and Raman spectroscopy confirms the presence of the $sp^2$ and $sp^3$ hybridization due to the disordered crystal structures of the carbon atoms results from oxidation and XPS analysis shows that epoxy pairs convert to more stable C=O and O-C=O groups with oxygen plasma treatment. The broad energy level distribution resulting from the broad size distribution of the $sp^2$ clusters produces excitation dependent PL emission in a broad wavelength range from 400 to 650 nm. Our results suggest that substrate influenced, or oxygen treatment GO has higher potential for future optoelectronic devices by its various optical properties and visible PL emission.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.12
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• pp.60-69
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• 2000

This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer(PADFE) using a 0.25-${\mu}m$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stages are inserted into the critical path of the ADFE by using delayed least-mean-square(DLMS) algorithm. Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width, and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The single-chip PADFE contains about 205,000 transistors on an area of about $1.96\times1.35-mm^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW. Test results show that the fabricated chip works functionally well.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.3
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• pp.214-218
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• 2020

In this study, Mg_xZn_1-xO thin films, which can be applied not only to active layers of light-emitting devices (LEDs), such as UV-LEDs, but also to solar cells, high mobility field-effect transistors, and power semiconductor devices, are fabricated using the sol-gel method. ZnO and Mg_0.3Zn_0.7O solution synthesized by the sol-gel method and the thin film were grown by spin coating on a Si (100) substrate and sapphire substrate. The solutions are synthesized by dissolving precursor materials in 2-methoxyethanol (2-ME) solvent, and then monoethanolamine (MEA) was added to the mixed solution as a sol stabilizer. Zinc acetate dihydrate is used as a ZnO precursor, while Mg nitrate hexahydrate and Mg acetate tetrahydrate are used as an MgO precursor. Then, the optical and structural characteristics of the fabricated thin films are compared. The molar concentration of the Zn precursor in the solvent is fixed at 0.3 M, and the amount of the Mg precursor is 30% of Mg²⁺/Zn²⁺. The optical characteristics are measured using an UV-vis spectrophotometer, and the transmittance of each wavelength is measured. Structural characteristics are measured using X-ray diffraction (XRD) and transmission electron microscopy (TEM). Composition analyses are performed using energy dispersive X-ray spectroscopy (EDS). The Mg_0.3Zn_0.7O thin film was well formed at the ratio of the Mg precursor added regardless of the type of Mg precursor, and the c-axis of the thin film was decreased, while the band gap was increased to 3.56 eV.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.565-568
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• 2014

This paper presents a 0.2V DC/DC boost converter with regulated output for thermoelectric energy harvesting. To use low voltages from a thermoelectric device, a start-up circuit consisting of native NMOS transistors and resistors boosts an internal VDD, and the boosted VDD is used to operate the internal control block. When the VDD reaches a predefined value, a detector circuit makes the start-up block turn off to minimize current consumption. The final boosted VSTO is achieved by alternately operating the sub-boost converter for VDD and the main boost converter for VSTO according to the comparator outputs. When the VSTO reaches 2.4V, a buck converter starts to operate to generate a stabilized output VOUT. Simulation results shows that the designed converter generates a regulated 1.8V output from an input voltage of 0.2V, and its maximum power efficiency is 60%. The chip designed using a $0.35{\mu}m$ CMOS process occupies $1.1mm{\times}1.0mm$ including pads.