• 조명전기설비학회논문지
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• 제24권4호
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• pp.1-9
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• 2010

LED구동회로및 제어회로를 개발하였다. 개발된 LED구동회로는 새로운 PWM회로를 가지고 있으며 LED열의 디밍, 전류 및 온도제어 및 통신 기능을 할 수 있다. 개발된 PWM회로는 기본적인 디지털 논리소자를 사용하여 만들어 질 수 있는 두 개의 링 발진기와 한 개의 카운터로 구성되어 있다. 부가적으로 이 회로는 온-오프 제어 모드, 비상모드, 전력절감모드를 가지고 있으며 직열통신을 이용해서 제어된다. 설계 된 PWM 발생기와 제어회로는 마그나칩/하이닉스의 디지털 공정을 이용하여 제작되었다. 제작된 칩은 LED구동장치와 제어기 보드에 장착되어 테스트 되었으며 성공적으로 동작하였다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2006년도 추계학술대회 논문집
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• pp.35-36
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• 2006

• 한국화재소방학회논문지
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• 제34권3호
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• pp.43-48
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• 2020

본 연구에서는 누전경보 기능이 내장된 누전경보차단기(JER-E2S, ETECKOREA Co., Korea)를 개발하고, 그 특성을 분석하였다. 개발된 누전경보차단기는 단상 220 V 전용으로 정격전류는 32 A, 20 A, 20 A(화장실용), 16 A 등이다. JER-E2S는 기존 누전차단기(ELB)의 특성을 모두 만족하고 있으며, 13 ± 2 mA의 저항성누설전류(Igr)인 화재전류가 전선로에 흐르면 실시간 검출하여 LED 램프로 위험 상태를 점멸할 수 있는 제품이다. 개발된 누전경보차단기는 LED 램프 및 통신기기 등에서 필연적으로 발생되는 용량성누설전류(Igc)에 대한 내성이 있어서 안정적인 전기 공급이 가능하다. 또한, 누전경보차단기는 순간지락 정전보호 기능이 있어서 작은 물방울 및 나뭇잎 등의 순간지락에 따른 차단기의 오동작 없이 전원 공급이 가능하다. 그리고 개발된 누전경보차단기의 대기전력은 0.1 W 이하로 기존 ELB에 비해 절전 성능이 3~8배 우수한 특성을 나타냈으며, 일반 120 ㎡의 아파트 1 세대에 10개 정도의 누전경보차단기가 설치되었을 때 1 개월에 2~5 kWh의 전기를 절감할 수 있다. 개발된 누전경보차단기는 기존 누전차단기의 특성을 만족할 뿐만 아니라 전기화재 예방기능 및 오동작 방지기능이 있어서 전원 품질이 우수하고, 전기화재 예방에 혁신적으로 기여할 수 있는 제품이다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.1275-1276
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• 2015

Full wave electromagnetic simulation or fabricated models of an antenna are used to predict its radiation characteristics. In this work estimation of radiated power of an antenna based on its electrical model is presented. The computed radiated power using the electrical model have good agreement with the radiated power results obtained through the full wave electromagnetic simulation of the antenna model. The presented approach offers the advantage of saving of computation time of the full wave EM simulation.

• Journal of Power Electronics
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• 제14권4호
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• pp.796-805
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• 2014

A digital controller with a low-power approach for point-of-load synchronous buck converters is discussed and compared with its analog counterpart to confirm its feasibility for system integration. The tri-mode digital controller IC in $0.35{\mu}m$ CMOS process is presented to demonstrate solutions that include a PID, quarter PID, and robust RST compensators. These compensators address the steady-state, stand-by, and transient modes according to the system operating point. An idle-tone free condition for ${\Sigma}-{\Delta}$ DPWM reduces the inherent tone noise under DC-excitation. Compared with that of the traditional approach, this condition generates a quasi-pure modulation signal. Experimental results verify the closed-loop performances and confirm the power-saving mechanism of the proposed controller.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제5B권4호
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• pp.366-373
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• 2005

This paper presents two new circuit topologies of the dc busline side active resonant snubber assisted voltage source high frequency link soft switching PWM full-bridge dc-dc power converters acceptable for either utility ac 200V-rms or ac 400V-rms input grid. These high frequency switching dc-dc converters proposed in this paper are composed of a typical voltage source-fed full-bridge PWM inverter, high frequency transformer with center tap, high frequency diode rectifier with inductor input filter and dc busline side series switches with the aid of a dc busline parallel capacitive lossless snubber. All the active switches in the full-bridge arms as well as dc busline snubber can achieve ZCS turn-on and ZVS turn-off transition commutation with the aid of a transformer leakage inductive component and consequently the total switching power losses can be effectively reduced. So that, a high switching frequency operation of IGBTs in the voltage source full bridge inverter can be actually designed more than about 20 kHz. It is confirmed that the more the switching frequency of full-bridge soft switching inverter increases, the more soft switching PWM dc-dc converter with a high frequency transformer link has remarkable advantages for its power conversion efficiency and power density implementations as compared with the conventional hard switching PWM inverter type dc-dc power converter. The effectiveness of these new dc-dc power converter topologies can be proved to be more suitable for low voltage and large current dc-dc power supply as arc welding equipment from a practical point of view.

• Journal of Electrical Engineering and Technology
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• 제2권1호
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• pp.89-97
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• 2007

This paper presents a new circuit topology of active edge resonant snubbers assisted half-bridge soft switching PWM inverter type DC-DC high power converter for DC bus feeding power plants. The proposed DC-DC power converter is composed of a typical voltage source-fed half-bridge high frequency PWM inverter with a high frequency planar transformer link in addition to input DC busline side power semiconductor switching devices for PWM control scheme and parallel capacitive lossless snubbers. The operating principle of the new DC-DC converter treated here is described by using switching mode equivalent circuits, together with its unique features. All the active power switches in the half-bridge arms and input DC buslines can achieve ZCS turn-on and ZVS turn-off commutation transitions. The total turn-off switching losses of the power switches can be significantly reduced. As a result, a high switching frequency IGBTs can be actually selected in the frequency range of 60 kHz under the principle of soft switching. The performance evaluations of the experimental setup are illustrated practically. The effectiveness of this new converter topology is proved for such low voltage and large current DC-DC power supplies as DC bus feeding from a practical point of view.

• 조명전기설비학회논문지
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• 제12권2호
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• pp.121-128
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• 1998

새로운 형태의 자기식 형광등 안정기를 설계 개발하여 고효율화 성능시험을 수행하였다. 새로운 철심재료인 고성능의 G-9 재료를 사용하고, 철심구조와 모양을 개선하였고 코일의 동선을 짧고 굵은 것으로 대체하여 직류저항 성분을 줄여서 안정기 자체의 에너지 손실을 감소시켰다. 반도체형 점등회로를 대폭 개선하여 순간 점등을 가능하게 하고 형광램프의 사용수명연장, 화재방지 등을 할 수 있게 하였다. 안정기 자체의 에너지 감소가 1.7Watt, 형광등 조명광 향상이 7.6[%] 증가 등 큰 에너지 절약을 보였다. 본 연구결과는 형광등 안정기의 기술 향상과 국가 전력소비 절감효과 등 중요한 의미가 있다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권4호
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• pp.215-220
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• 2007

Leakage current of CMOS circuits has become a major factor in VLSI design these days. Although many circuit-level techniques have been developed, most of them require significant amount of designers' effort and are not aligned well with traditional VLSI design process. In this paper, we focus on technology mapping, which is one of the steps of logic synthesis when gates are selected from a particular library to implement a circuit. We take a radical approach to push the limit of technology mapping in its capability of suppressing leakage current: we use a probabilistic leakage (together with delay) as a cost function that drives the mapping; we consider pin reordering as one of options in the mapping; we increase the library size by employing gates with larger gate length; we employ a new flipflop that is specifically designed for low-leakage through selective increase of gate length. When all techniques are applied to several benchmark circuits, leakage saving of 46% on average is achieved with 45-nm predictive model, compared to the conventional technology mapping.

• 조명전기설비학회논문지
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• 제24권11호
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• pp.17-22
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• 2010

This paper presents a unique method for simulating permanent magnet motors without time-consuming numerical methods used in the conventional magnetic circuit method. The conventional method gives us average values like torque and power over specified periods of time, but it is usually very difficult and time-consuming to obtain instantaneous characteristics like cogging torques and torque ripples. The convolution operations method we present, however, considers relative angle variations of stator magnetic circuits and rotor magnetic circuits. As a result, it makes uses of instantaneous values possible. The authors compare the new method with the coventional method and verify that calculating cogging torque values and back-emf values is possible with the proposed new convolution method.