• Journal of Biomedical Engineering Research
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• v.36 no.5
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• pp.169-176
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• 2015

Implantable closed-loop epilepsy controllers require ideally both accurate epileptic seizure detection and low power consumption. On-chip oscillators can be used in implantable devices because they consume less power than other oscillators such as crystal oscillators. In this study, we investigated the tolerable error range of a lower power on-chip oscillator without losing the accuracy of seizure detection. We used 24 ictal and 14 interictal intracranial electroencephalographic segments recorded from epilepsy surgery patients. The performance variations with respect to oscillator frequency errors were estimated in terms of specificity, modified sensitivity, and detection timing difference of seizure onset using Generic Osorio Frei Algorithm. The frequency errors of on-chip oscillators were set at ${\pm}10%$ as the worst case. Our results showed that an oscillator error of ${\pm}10%$ affected both specificity and modified sensitivity by less than 3%. In addition, seizure onsets were detected with errors earlier or later than without errors and the average detection timing difference varied within less than 0.5 s range. The results suggest that on-chip oscillators could be useful for low-power implantable devices without error compensation circuitry requiring significant additional power. These findings could help the design of closed-loop systems with a seizure detector and automated stimulators for intractable epilepsy patients.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.95-101
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• 2008

We have used diversely the multilayer ceramic oscillator of the SMD(Surface Mounted Device) package technology that connects the crystal with the chip package. Such an oscillator occurs a stray inductance and a parasitic capacitance by the length and inner pattern. And it has been happened an amplitude attenuation and signal loss due to the reflection of power source and noise component. So we don't evaluate the precise performance of the oscillator for these factors. In this paper we have developed the Jig system to evaluate the performance of the oscillator. Through this system, we will expect an advanced performance of the oscillator and redesign an oscillator of the low jitter characteristics and low phase noise.

• Journal of the Korean Institute of Telematics and Electronics
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• v.12 no.3
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• pp.20-25
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• 1975

A microwave oscillator stabilized by a phase-locked loop (PLL) is developed. The PLL system is chosen 'compared with the cavity stabilized oscillator in view of the domestic manufacturing, because special machining and materials are needed for the latter. A sampler with a low pass filter is shown to be used as a phase detector in the PLL, and the sampler capable of sampling up to 4GHz is developed for this use. Frequency stability of about 10-6 is obtained from the developed microwave oscillator, operating at 2.16 GHz with more than 120 milliwatts output power, Ivhereby a crystal oscillator operating at about 110MHz is used as a reference source in the PLL. The capturing range of this oscillator is extended up to its lock-in-range of about 10MHz by employing a search oscillator in the system.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.4
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• pp.886-893
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• 2004

In this paper, active resonator oscillator using active band pass filter with gain, active resonator with negative resistance using transistor(agilent ATF-34143) is designed and fabricated. Proposed active resonator oscillator for local oscillator in ISM band(5.8GHz) is designed with 5.5 GHz oscillation frequency. Designed active resonator oscillator implemented on the substrate which has the relative dielectric constant of 3.38, the height of 0.508mm, and metal thickness of 0.018mm. Active resonator oscillators using active band pass filter with gain show the oscillation frequency of 5.6GHz with the output power of -2dBm and phase noise of -81dBc/Hz at the offset frequency of 100kHz. Active resonator oscillators active resonator with negative resistance show the oscillation frequency of 5.6, 5.8GHz with the output power of -4dBm and phase noise of -91dBc/Hz at the offset frequency of 100kHz.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.88-91
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• 2000

An MMIC oscillator operating at the 24.55 GHz has been designed using 0.2 ${\mu}{\textrm}{m}$AlGaAs/InGaAs/GaAs Pseudomorphic HEMT technology. The active device used in the oscillator design has a 0.2 ${\mu}{\textrm}{m}$ gate length PHEMT with 4$\times$80 ${\mu}{\textrm}{m}$ gate width. We obtained 4.08 dB of S$_{21}$ gain and 317 mS/mm of transconductance, and extrapolated unit current gain cut-off frequency (f$_{T}$) and maximum oscillation frequency (fmax) were 62 GHz and 120 GHz, respectively. The circuit are based on a series feedback and negative resistance topology. Microstrip line open stub is used to terminating. The oscillator circuits has designed for delivering maximum power to load and conjugated matching. The simulated small signal negative resistance was 50 Ω. We obtained 1.002 of loop gain and 0.0005$^{\circ}$angle from the simulation by HP libra 6.1. The layout for oscillator is 1.2$\times$1.8 $\textrm{mm}^2$.>.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.202-207
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• 2015

A CMOS relaxation oscillator, with high robustness over process, voltage and temperature (PVT) variations, is designed in $0.18{\mu}m$ CMOS. The proposed oscillator, consisting of full-differential charge-discharge timing circuit and switched-capacitor based voltage-to-current conversion, could be expanded to a simple open-loop frequency synthesizer (FS) with output frequency digitally tuned. Experimental results show that the proposed oscillator conducts subcarrier generation for frequency-modulated ultra-wideband (FM-UWB) transmitters with triangular amplitude distortion less than 1%, and achieves frequency deviation less than 8% under PVT and phase noise of -112 dBc/Hz at 1 MHz offset frequency. Under oscillation frequency of 10.5 MHz, the presented design has the relative FS error less than 2% for subcarrier generation and the power dissipation of 0.6 mW from a 1.8 V supply.

• Journal of Advanced Marine Engineering and Technology
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• v.33 no.5
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• pp.756-761
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• 2009

In this paper, a X band voltage controlled oscillator is proposed. The oscillator uses a transistor as an oscillating element and its oscillating frequencies are controlled by the tuning voltage of varactor diode. Using the circuit simulation tools, the matching circuits between the transistor and varactor diode, its input and output matching circuits, and a feedback circuits are designed. The measured results of the fabricated oscillator show that its oscillation frequencies are from 10.50GHz to 10.88GHz according to the turning voltages of 1V to 18V, its output power levels are about 4.3dBm, and its phase noise is around -43.5dBc/Hz at 100kHz offset frequency of 10.5GHz.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.385-388
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• 2000

In this paper, the Ka-band Dielectric resonator oscillator has been designed and fabricated. The resonator network was simulated using HFSS program. The design method of an oscillator is the small-signal S-parameter design. The Push-push DRO employs a hetero junction FET (NE32484A). The fabricated Push-push DRO shows such characteristics as the phase noise -106 ㏈c/Hz at the 100 ㎑ frequency offset. the output power and fundamental frequency surpression were -6 ㏈m and -29 ㏈c, respectively.

• ETRI Journal
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• v.27 no.1
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• pp.75-80
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• 2005

This paper addresses a fully-integrated low phase noise X-band oscillator fabricated using a carbon-doped InGaP heterojunction bipolar transistor (HBT) GaAs process with a cutoff frequency of 53.2 GHz and maximum oscillation frequency of 70 GHz. The oscillator circuit consists of a negative resistance generating circuit with a base inductor, a resonating emitter circuit with a microstrip line, and a buffering resistive collector circuit with a tuning diode. The oscillator exhibits 4.33 dBm output power and achieves -127.8 dBc/Hz phase noise at 100 kHz away from a 10.39 GHz oscillating frequency, which benchmarks the lowest reported phase noise achieved for a monolithic X-band oscillator. The oscillator draws a 36 mA current from a 6.19 V supply with 47.1 MHz of frequency tuning range using a 4 V change. It occupies a $0.8mm{\times}0.8mm$ die area.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.4
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• pp.538-542
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• 2018

In order to generate a clock source with low cost and high performance in system on chip(SoC), a relaxation oscillator with stable output characteristics according to PVT(process, voltage and temperature) fluctuation require a low area and a low power. In this paper, we propose a solution to reduce the current loss caused by parasitic components in the conventional relaxation oscillator. Since the slew rate of the bias current and the capacitor are adjusted to be the same through the proposed solution, a relaxation oscillator with low area characteristics is designed for the same clock source frequency implementation. The proposed circuit is designed using the TSMC CMOS 0.18um process. The Simulation results show that the relaxation oscillator using the proposed solution can prevent the current loss of about $279{\mu}A$ and reduce the total chip area by 20.8% compared with the conventional oscillator in the clock source frequency of 96 MHz.