• 제목/요약/키워드: Power Electronics Circuits

검색결과 873건 처리시간 0.026초

능동 전력 디커플링 회로의 커패시턴스 최적 설계에 관한 연구 (A Study on Optimal Design of Capacitance for Active Power Decoupling Circuits)

  • 백기호;박성민;정교범
    • 전력전자학회논문지
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    • 제24권3호
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    • pp.181-190
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    • 2019
  • Active power decoupling circuits have emerged to eliminate the inherent second-order ripple power in a single-phase power conversion system. This study proposes a design method to determine the optimal capacitance for active power decoupling circuits to achieve high power density. Minimum capacitance is derived by analyzing ripple power in a passive power decoupling circuit, a buck-type circuit, and a capacitor-split-type circuit. Double-frequency ripple power decoupling capabilities are also analyzed in three decoupling circuits under a 3.3 kW load condition for a battery charger application. To verify the proposed design method, the performance of the three decoupling circuits with the derived minimum capacitance is compared and analyzed through the results of MATLAB -Simulink and hardware-in-the-loop simulations.

직렬입력-병렬출력 연결된 2-스위치 포워드 컨버터의 시간 영역 시뮬레이션을 위한 고속 분리 알고리즘 (A Fast-Decoupled Algorithm for Time-Domain Simulation of Input-Series-Output-Parallel Connected 2-Switch Forward Converter)

  • 김만고
    • 동력기계공학회지
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    • 제6권3호
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    • pp.64-70
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    • 2002
  • A fast decoupled algorithm for time domain simulation of power electronics circuits is presented. The circuits can be arbitrarily configured and can incorporate feedback amplifier circuits. This simulation algorithm is performed for the input series output parallel connected 2 switch forward converter. Steady state and large signal transient responses due to a step load change are simulated. The simulation results are verified through experiments.

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Power Supply Circuits with Small size for Adiabatic Dynamic CMOS Logic Circuits

  • Sato, Masashi;Hashizume, Masaki;Yotuyanagi, Hiroyuki;Tamesada, Takeomi
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 ITC-CSCC -1
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    • pp.179-182
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    • 2000
  • Adiabatic dynamic CMOS logic circuits, which are called ADCL circuits, promise us to implement low power logic circuits. Since the power supply source for ADCL circuits had not been developed, we proposed a power supply circuit for them. It is shown experimentally that by using the power supply circuit ADCL circuits can work with lower power consumption than conventional static CMOS circuit. In this paper, the power supply circuit is improved so that the power consumption can be reduced. Also, it is shown by some experiments that by using the circuit, ADCL circuits can work with lower power consumption than before Improving.

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출력주파수의 고주파화를 위한 전력용 Transistor Family의 구동기술 (A New Drive Technology of Power Transistor Family Devices for Speed-up of the Output Frequency)

  • 유동욱;김동희;권순만;변영복;배진호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1987년도 정기총회 및 창립40주년기념 학술대회 학회본부
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    • pp.539-542
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    • 1987
  • This paper presents driving circuits technology to enable high speed drive of MOSFET, IGBT(Insulated Gate Bipolar Transistor) and SIT(Static Induction Transistor). In addition to, it demonstrates application circuits(high frequency resonant type inverters, ultrasonic power supply etc.) using the, developing drive circuits.

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저전력 논리 회로 설계를 위한 커널에 바탕을 둔 precomputation 알고리듬 (A kernel-based precomputation scheme for low-power design fo combinational circuits)

  • 최익성;류승현
    • 전자공학회논문지C
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    • 제34C권11호
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    • pp.12-19
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    • 1997
  • In this paper, we present a logic synthesis algorithm for low powr design fo combinational circuits. The proposed algorithm reduces power dissipation by eliminating unnecessary signal transitions. The proposed algorithm restructures a given circuit by using a kernel as prediction logic in a precomputation-based scheme such that switching activity of circuit can be minimized. Experimental results show that the system is efficient for low power design of combinational circuits.

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마이크로프로세서를 이용한 직류전동기의 위치제어 시스템 (A Position Control System of D.C. Motor Using Microprocessor)

  • 안미랑;김한수;김영석;조기연
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1987년도 정기총회 및 창립40주년기념 학술대회 학회본부
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    • pp.355-358
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    • 1987
  • A design of digital position control system with DC Motor is presented. The digital position control system is constructed by power circuits, interface circuits and control circuits using single chip microprocessor (8096). All control functions are implemented on the 16 bit micro-processor requiring only on incremental encoder for speed and position sensing. The control schemes are used by the proportional control for some modifications and braking algorithms. This digital position system offered to the fast response, good steady-state accuracy, flexibility and reliability, Hardware, software features and experimental results of this system are described.

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Nonlinear Representation of Two-Stage Power-Factor-Correction AC/DC Circuits

  • Orabi Mohamed;Ninomiya Tamotsu
    • Journal of Power Electronics
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    • 제4권4호
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    • pp.197-204
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    • 2004
  • Two-stage Power-Factor-Correction (PFC) converters are the most common circuits for drawing sinusoidal and in phase current waveforms from an ac source with a good regulated output voltage. The first stage is a boost PFC converter with average-current-mode control for achieving the near-unity power factor and the second stage is a forward converter with voltage-mode control to regulate the output voltage. Stability analysis and design methods of two-stage PFC converters have previously been discussed using linear models. Recently, new nonlinear phenomena have been detected in pre-regulator boost PFC circuits and a new nonlinear model has been proposed for pre-regulated PFC converters. Therefore, investigation of two-stage PFC converters from the nonlinear viewpoint becomes important because the second stage DC/DC converter adds more complexity to the circuit. So, this paper introduces a study of the stability of two-stage PFC converters. A novel nonlinear model of two-stage PFC converters is proposed. Then, a stability analysis is made based upon this nonlinear model. The high correspondence between the simulated and experimental results confirms our analysis.

High speed wide fan-in designs using clock controlled dual keeper domino logic circuits

  • Angeline, A. Anita;Bhaaskaran, V.S. Kanchana
    • ETRI Journal
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    • 제41권3호
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    • pp.383-395
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    • 2019
  • Clock Controlled Dual keeper Domino logic structures (CCDD_1 and CCDD_2) for achieving a high-speed performance with low power consumption and a good noise margin are proposed in this paper. The keeper control circuit comprises an additional PMOS keeper transistor controlled by the clock and foot node voltage. This control mechanism offers abrupt conditional control of the keeper circuit and reduces the contention current, leading to high-speed performance. The keeper transistor arrangement also reduces the loop gain associated with the feedback circuitry. Hence, the circuits offer less delay variability. The design and simulation of various wide fan-in designs using 180 nm CMOS technology validates the proposed CCDD_1 and CCDD_2 designs, offering an increased speed performance of 7.2% and 8.5%, respectively, over a conventional domino logic structure. The noise gain margin analysis proves good robustness of the CCDD structures when compared with a conventional domino logic circuit configuration. A Monte Carlo simulation for 2,000 runs under statistical process variations demonstrates that the proposed CCDD circuits offer a significantly reduced delay variability factor.

모듈형 플러그인 능동전력디커플링 회로를 위한 계통전압 추종 방법 (Grid Voltage Estimation Method for Modular Plug-in Active Power Decoupling Circuits)

  • 김동희;김정태;박성민;정교범
    • 전력전자학회논문지
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    • 제26권4호
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    • pp.294-297
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    • 2021
  • A grid voltage estimation method for modular plug-in active power decoupling (APD) circuits is proposed in this study as direct replacements of electrolytic capacitors. Since modular plug-in APD circuits cannot have additional grid voltage sensors and should be operated independently without information exchange with the front-end converter, it is impossible to obtain the phase information of the grid directly. Therefore, the proposed method uses the second-order harmonic component of the DC-link voltage to estimate the grid voltage necessary to control the APD circuit. By employing the proposed method, the concept of modular plug-in APD circuits can be realized and implemented without direct detection of the grid voltage. The experimental results based on hardware-in-the-loop simulation (HILS) validate the effectiveness of the proposed control method.

SINGLE-PHASE ACTIVE RECTIFIER WITH HIGH POWER FACTOR CAPABILITY FOR INVERTER AIR-CONDITIONER

  • Jung, Yong-Chae;Kwon, Kyung-Ahn
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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    • pp.677-682
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    • 1998
  • A Single-phase Active Rectifier (SAR) [4-6] with high power factor capability is adopted to satisfy the international harmonic current standards such as IEC 1000-3-2. To minimize the input current distortion and to apply the control IC, such as FA5331, UC3854, ML4821 and so forth, the new adequate sensing circuits of the input voltage and current are proposed. There are tow methods applicable the SAR to inverter air-conditioner from the viewpoint of both efficiency and cost. The selecting methods of the passive components are presented for the two approaches. Using the determined components, the loss analyses are carried out. The prototype SAR circuits of these two approaches with 3kW power consumption are built and the operation and performance of the circuits with power factor correction capability are verified through the experimental results.

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