• Journal of Information Processing Systems
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• v.7 no.1
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• pp.93-102
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• 2011

In deeply scaled CMOS technologies, two major non-ideal factors are threatening the survival of the CMOS; i) PVT (process, voltage, and temperature) variations and ii) leakage power consumption. In this paper, we propose a novel post-silicon tuning methodology to scale optimum voltage and frequency "dynamically". The proposed design technique will use our PVT sensor circuits to monitor the variations and based on the monitored variation data, voltage and frequency will be compensated "automatically". During the compensation process, supply voltage is dynamically adjusted to guarantee the minimum total power consumption without violating the frequency requirement. The simulation results show that the proposed technique can reduce the total power by 85% and the static power by 53% on average for the selected ISCAS'85 benchmark circuits with 45 nm CMOS technology compared to the results of the traditional PVT compensation method.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1661-1668
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• 2016

A fixed off-time controlled high power factor ac-dc LED driver is proposed in this paper, which employs a novel zero-crossing-compensation (ZCC) circuit based on a fixed off-time controlled scheme. Due to the parasitic parameters of the system, the practical waveforms have a dead region. By detecting the zero-crossing boundary, the proposed ZCC circuit compensates the control signal VCOMP within the dead region, and is invalid above this region. With further optimization of the parameters KR and Kτ of the ZCC circuit, the dead zone can be eliminated and lower THD is achieved. Finally, the chip is implemented in HHNEC 0.5μm 5V/40V HVCMOS process, and a prototype circuit, delivering 7~12W of power to several 3-W LED loads, is tested under AC input voltage ranging from 85V to 265V. The test results indicate that the average total harmonic distortion (THD) of the entire system is approximately 10%, with a minimum of 5.5%, and that the power factor is above 0.955, with a maximum of 0.999.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.6
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• pp.515-522
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• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both v voltage-fed and current-f,어 ek'Ctronic ballast. The proposed PFC circuits use valley-fil[(VF) type DClink s stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations d during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant c capaCltor In current-fed type, the charge pump capacitors are connc'Ctc'Cl with the additional second따y-side of t the power transformer. The measured PF is higher than 0.99 and THD is about 10% for all proposed PFC c circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for i implementing cost longrightarroweffective electronic ballast.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.3
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• pp.47-55
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• 1996

An optical transmitter, which is a key component of the optical transmission system, converts the electrical signal to optical signal and consists of a high-speed current-pulse driver for laser diode and low-speed feedback loops that stabilize optical power against aging, power supply voltage fluctuations, and ambient temperature changes. In this paper, the power-stabilizing part, which forms the bulk of the optical transmitter circuitry was designed in integrted circuits. Operational amplifiers and reference voltage generation circuits, which were identified as key building blocks for the power-stabilizing feedback loops, were designed and were subsequently verified through HSPICE simulations. The designed operational amplifier consists of a two-stage folded cascode amplifier and class AB output stage, whereas the reference voltage is obtained by bandgap reference circuits. Finally the power-stabilizing circuitry was laid out based on 3\mu$m CMOS design rules for fabrication.

• Journal of Power Electronics
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• v.5 no.3
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• pp.233-239
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• 2005

In this paper, a new conceptual circuit configuration of a 3-phase voltage source, soft switching AC-DC-AC converter using an IGBT module, which has one ARCPL circuit and one ARDCL circuit, is presented. In actuality, the ARCPL circuit is applied in the 3-phase voltage source rectifier side, and the ARDCL circuit is in the inverter side. And more, each power semiconductor device has a novel clamp snubber circuit, which can save the power semiconductor device from voltage and current across each power device. The proposed soft switching circuits have only two active power semiconductor devices. These ARCPL and ARDCL circuits consist of fewer parts than the conventional soft switching circuit. Furthermore, the proposed 3-phase voltage source soft switching AC-DC-AC power conversion system needs no additional sensor for complete soft switching as compared with the conventional 3-phase voltage source AC-DC-AC power conversion system. In addition to this, these soft switching circuits operate only once in one sampling term. Therefore, the power conversion efficiency of the proposed AC-DC-AC converter system will get higher than a conventional soft switching converter system because of the reduced ARCPL and ARDCL circuit losses. The operation timing and terms for ARDCL and ARCPL circuits are calculated and controlled by the smoothing DC capacitor voltage and the output AC current. Using this control, the loss of the soft switching circuits are reduced owing to reduced resonant inductor current in ARCPL and ARDCL circuits as compared with the conventional controlled soft switching power conversion system. The operating performances of proposed soft switching AC-DC-AC converter treated here are evaluated on the basis of experimental results in a 50kVA setup in this paper. As a result of experiment on the 50kVA system, it was confirmed that the proposed circuit could reduce conduction noise below 10 MHz and improve the conversion efficiency from 88. 5% to 90.5%, when compared with the hard switching circuit.

• Journal of Power Electronics
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• v.9 no.4
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• pp.567-574
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• 2009

A linear transfer function for the output current control of frequency-controlled resonant inverters is proposed in this paper. The circuit of resonant inverters can be transformed into two coupled circuits through the complex phasor transform. The circuits consist of cross-coupled power sources and passive elements. The circuits are used to induce the state space equation, which is transformed into the $4^{th}$ order cross-coupled transfer function. The $4^{th}$ order cross-coupled transfer function is modeled into a $2^{nd}$ order linear transfer function based on a behavior analysis of the pole and zero locations that facilitate a simple and intuitive linear transfer function. The feasibility and validity of the proposed linear transfer function were verified by simulation and experiment.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1280-1283
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• 2002

This paper discusses issues in VLSI design and implementation of high performance datapath circuits. Of particular concern will he various types of multiplier and adder, which are fundamental to DSP operations. Performance comparison will be provided in terms of sampling speed, layout area, and in particular, power consumption, with techniques that may be applied to reduce power dissipation also suggested. As an example, a low power, high performance recursive filter achieved through bit-level pipelining technique is illustrated

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.313-319
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• 2012

The power supply rejection (PSR) of low drop-out (LDO) voltage regulator is improved by employing an error amplifier (EA) which is configured so the power supply noise be cancelled at the output. The LDO regulator is implemented in a 0.13-${\mu}m$ standard CMOS technology. The external supply voltage level is 1.2-V and the output is 1.0-V while the load current can range from 0-mA to 50-mA. The power supply rejection is 46-dB, 49-dB, and 38-dB at DC, 2-MHz, and 10-MHz, respectively. The quiescent current consumption is 65-${\mu}A$.

• Electronics and Telecommunications Trends
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• v.36 no.3
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• pp.53-64
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• 2021

As the 5G service market is expected to grow rapidly, the development of high-power, high-efficiency power amplifiers for the 5G communication infrastructure is indispensable. Gallium nitride (GaN) is attracting great interest as a key device in power devices and integrated circuits due to its wide bandgap, high carrier concentration, high electron mobility, and high-power saturation characteristics. In this study, we investigate the technology trends of Ka-band GaN radio frequency (RF) power devices and integrated circuits for operation in the millimeter-wave band of recent 5G mobile communication services. We review the characteristics of GaN RF high electron mobility transistor (HEMT) devices to implement power amplifiers operating at frequencies around 28 GHz and compare the technology of foreign companies with the device characteristics currently developed by the Electronics and Telecommunication Research Institute (ETRI). In addition, the characteristics of Ka-band GaN monolithic microwave integrated circuit (MMIC) power amplifiers manufactured using various GaN HEMT device technologies are reviewed by comparing characteristics such as frequency band, output power, and output power density of integrated circuits. In addition, by comparing the performance of the power amplifier developed by ETRI, the current status and future direction of domestic GaN power devices and integrated circuit technology will be discussed.

• Journal of Power Electronics
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• v.2 no.4
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• pp.258-267
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• 2002

This paper presents the principal features of the software modules developed to provide an interactive teaching/learning environment in Power Electronics that can be used by educators and students. The software modules utilize an object oriented programming LabVIEW that provides a highly flexible graphical user interface. The paper highlights the principal features the software components and illustrates a number of highly interactive graphical user interfaces of selected Power Electronics circuits and systems.