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http://dx.doi.org/10.5573/JSTS.2012.12.3.313

Low Drop-Out (LDO) Voltage Regulator with Improved Power Supply Rejection  

Jang, Ho-Joon (Integrated Circuits Laboratory, Hanyang University)
Roh, Yong-Seong (Integrated Circuits Laboratory, Hanyang University)
Moon, Young-Jin (Integrated Circuits Laboratory, Hanyang University)
Park, Jeong-Pyo (Integrated Circuits Laboratory, Hanyang University)
Yoo, Chang-Sik (Integrated Circuits Laboratory, Hanyang University)
Publication Information
JSTS:Journal of Semiconductor Technology and Science / v.12, no.3, 2012 , pp. 313-319 More about this Journal
Abstract
The power supply rejection (PSR) of low drop-out (LDO) voltage regulator is improved by employing an error amplifier (EA) which is configured so the power supply noise be cancelled at the output. The LDO regulator is implemented in a 0.13-${\mu}m$ standard CMOS technology. The external supply voltage level is 1.2-V and the output is 1.0-V while the load current can range from 0-mA to 50-mA. The power supply rejection is 46-dB, 49-dB, and 38-dB at DC, 2-MHz, and 10-MHz, respectively. The quiescent current consumption is 65-${\mu}A$.
Keywords
Low drop-out regulator; error amplifier; power-supply rejection;
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