• Title/Summary/Keyword: Power Consumption Information

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Design and Implementation of An Authentication System for Residential Permit Parking Using Wireless Sensor Networks (무선 센서 네트워크를 이용한 거주자우선주차 인증시스템의 설계 및 구현)

  • Park, Jun-Sik;Kwon, Chun-Ja;Kim, Hyun-Chun;Kim, Brian
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.5
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    • pp.1037-1045
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    • 2007
  • An efficient management system for parking lots and traffic monitoring in a metropolitan city is a very important issue, which is tightly closed to qualify of life. While a residential permit parking program has been contributing to resolve the lack of parking places, there has been no autonomous authentication system due to no apparent entrance gate and smallness of each parking zone. In this paper, we propose and implement an authentication system for residential permit parking lot using wireless sensor networks, which is cost-effective and even no need for additional managing person. Through the experimental evaluation, we analyzed relationship between the life time of sensor nodes and the various values of sleep periods to minimize power consumption of the nodes, and also showed that the difference of luminance sensed by each sensor node is at least 45 or bigger between when the parking place is occupied or not, resultingly it can be used to decide whether a parking place is occupied or not by simply detecting the change of luminance sensed.

HMT (Handover Map Table) based Handover Algorithm in DVB-H Networks (DVB-H 네트워크에서 HMT (handover map table)에 기반한 핸드오버 알고리즘)

  • Cho, Jae-Soo;Park, Hyung-Kun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.7
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    • pp.1256-1262
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    • 2008
  • In mobile broadcasting networks, handover is an important issue to support seamless mobility. DVB-H(Digital Video Broadcasting for Handheld) standard was developed to enhance mobile features for DVB-T(Digital Video Broadcasting -Terrestrial) standard. This paper proposes new approaches for improving handover performance in the DVB-H networks. The proposed handover schemes are targeted to two different DVB-H receivers: One is for the receivers equipped with GPS devices. The other is for ones without GPS support. The first handover approach modifies the cell description table (CDT) proposed in the literature [1]. The second proposes a novel estimation technique of predefined handover region based on a new handover map table (HMT). This new handover approach estimates a predefined handover region with the measured RSSI(Received Signal Strength Indication) signal patterns. Using proposed handover algorithm, we can reduce time and power consumption. Through the computer simulations, we evaluate the performance of handover algorithm.

A Design of ADC with Multi SHA Structure which for High Data Communication (고속 데이터 통신을 위한 다중Multi SHA구조를 갖는 ADC설계)

  • Kim, Sun-Youb
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.9
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    • pp.1709-1716
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    • 2007
  • In this paper, ADC with multi SHA structure is proposed for high speed operation. The proposed structure incorporates a multi SHA block that consists of multiple SHAs of identical characteristics in parallel to improve the conversion speed. The designed multi SHA is operated by non-overlapping clocks and the sampling speed can be improved by increasing the number of multiplexed SHAs. Pipelined A/D converter, applying the proposed structure, is designed to satisfy requirement of analog front-end of VDSL modem. The measured INL and DNL of designed A/D converter are $0.52LSB{\sim}-0.50LSB$ and $0.80LSB{\sim}-0.76LSB$, respectively. It satisfies the design specifications for VDSL modems. The simulated SNR is about 66dB which corresponds to a 10.7 bit resolution. The power consumption is 24.32mW.

Wideband Jamming Signal Remove Using Adaptive Array Algorithm (적응배열 알고리즘을 이용한 광대역 재밍 신호 제거)

  • Lee, Kwan-Hyeong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.12 no.4
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    • pp.419-424
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    • 2019
  • In this paper, we proposed an algorithm to estimate the desired target in wideband jamming signal environment. In order to suppress the jamming signal, we use the spatial time adaptive algorithm and QR decomposition to obtain the optimal weight. The spatial time adaptive algorithm of adaptive array antenna system multiplies the tap delay signal by a complex weight to obtain a weight. In order to minimize the power consumption because of the inverse matrix, optimal weight is obtained by using QR decomposition. Through simulation, we compare and analyze the performance of the proposed algorithm and the existing algorithm. In the target estimation of [-40o,0o,+40o], the proposed algorithm estimated all three targets, but the existing algorithm estimated only [0o] due to of the jamming signal. We prove that the proposed algorithm improves performance by removing the jamming signal and estimating the target accurately.

Performance Comparison of Full-Wave Rectifiers for Vibration-Energy Harvesting (진동에너지 하베스팅을 위한 전파 정류기 성능 비교)

  • Yoon, Eun-Jung;Yang, Min-Jae;Yu, Chong-Gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.278-281
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    • 2014
  • This paper presents the performance comparison of three types of full-wave rectifiers for vibration energy harvesting. The first rectifier is consisted of two active diodes and two MOSFETs, and the comparators of the active diodes are powered from the output of the rectifier. The second one is a 2-stage full-wave rectifier. It comprises the basic rectifier consisted of four MOSFETs and an active diode. The comparator is also powered from the output of the rectifier. The third one is an input powered rectifier. It has the same structure as the second rectifier, but the comparator is powered from the input of the rectifier. These rectifiers have been designed using a 0.35um CMOS process and their performances have been compared through simulations. In terms of efficiency, the first rectifier shows the best performance at heavy loads, but the second one is suitable at light loads. When the power consumption during absence of vibration is more important than efficiency, the input-powered rectifier is proper.

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A Study on PCS for ML-Based Electrical Propulsion System (ML 기반의 전기추진시스템을 위한 PCS에 관한 연구)

  • Lee, Jong-Hak;Lee, Hun-Seok;Oh, Jin-Seok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.23 no.9
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    • pp.1025-1031
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    • 2019
  • This study proposes a PCS that enables efficient operation of seawater pumps for ships by implementing ML-based algorithms. Seawater temperature, RPM and power consumption data are acquired from two ships with PCS, analyzed with regression analysis method, and new algorithms are presented. Using the algorithms presented, Ship A saved about 36% compared to the PCS application, and ML-based algorithms in certain sea temperatures of 19 to 27 degrees Celsius and above 32 degrees Celsius were about 1% lower than Ship A's PCS. Ship B saved about 50% compared to PCS not applied, and about 2% more than Ship B's PCS in waters above $19^{\circ}C$, a specified sea temperature. The derived data can be used to suggest the optimum pump speed and sea route. In addition, the trend of acquired data can be used to infer the performance of the pump or the timing of elimination of the MGPS when efficiency becomes poor.

Ka-Band Variable-Gain CMOS Low Noise Amplifier for Satellite Communication System (위성 통신 시스템을 위한 Ka-band 이득제어 CMOS 저잡음 증폭기)

  • Im, Hyemin;Jung, Hayeon;Lee, Jaeyong;Park, Sungkyu;Park, Changkun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.23 no.8
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    • pp.959-965
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    • 2019
  • In this paper, we design a low noise amplifier to support ka-band satellite communication systems using 65-nm RFCMOS process. The proposed low noise amplifier is designed with high-gain mode and low-gain mode, and is designed to control the gain according to the magnitude of the input signal. In order to reduce the power consumption, the supply voltage of the entire circuit is limited to 1 V or less. We proposed the gain control circuit that consists of the inverter structure. The 3D EM simulator is used to reduce the size of the circuit. The size of the designed amplifier including pad is $0.33mm^2$. The fabricated amplifier has a -7 dB gain control range in 3 dB bandwidth and the reflection coefficient is less than -6 dB in high gain mode and less than -15 dB in low gain mode.

A Multi-Period Input DEA Model with Consistent Time Lag Effects (일관된 지연 효과를 고려한 다기간 DEA 모형)

  • Jeong, Byungho;Zhang, Yanshuang;Lee, Taehan
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.42 no.3
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    • pp.8-14
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    • 2019
  • Most of the data envelopment analysis (DEA) models evaluate the relative efficiency of a decision making unit (DMU) based on the assumption that inputs in a specific period are consumed to produce the output in the same period of time. However, there may be some time lag between the consumption of input resources and the production of outputs. A few models to handle the concept of the time lag effect have been proposed. This paper suggests a new multi-period input DEA model considering the consistent time lag effects. Consistency of time lag effect means that the time delay for the same input factor or output factor are consistent throughout the periods. It is more realistic than the time lag effect for the same output or input factor can vary over the periods. The suggested model is an output-oriented model in order to adopt the consistent time lag effect. We analyze the results of the suggested model and the existing multi period input model with a sample data set from a long-term national research and development program in Korea. We show that the suggested model may have the better discrimination power than existing model while the ranking of DMUs is not different by two nonparametric tests.

Development of X-Ray Array Detector Signal Processing System (X-Ray 어레이 검출 모듈 신호처리 시스템 개발)

  • Lim, Ik-Chan;Park, Jong-Won;Kim, Young-Kil;Sung, So-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.23 no.10
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    • pp.1298-1304
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    • 2019
  • Since the 9·11 terror attack in 2001, the Maritime Logistics Security System has been strengthened and required X-ray image for every imported cargos from manufacturing countries to United States. For scanning cargos, the container inspection systems use high energy X-rays for examination of contents of a container to check the nuclear, explosive, dangerous and illegal materials. Nowadays, the X-ray cargo scanners are established and used by global technologies for inspection of suspected cargos in the customs agency but these technologies have not been localized and developed sufficiently. In this paper, we propose the X-ray array detector system which is a core component of the container scanning system. For implementation of X-ray array detector, the analog and digital signal processing units are fabricated with integrated hardware, FPGA logics and GUI software for real-time X-ray images. The implemented system is superior in terms of resolution and power consumption compared to the existing products currently used in ports.

Design of Phase Locked Loop (PLL) based Time to Digital Converter for LiDAR System with Measurement of Absolute Time Difference (LiDAR 시스템용 절대시간 측정을 위한 위상고정루프 기반 시간 디지털 변환기 설계)

  • Yoo, Sang-Sun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.5
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    • pp.677-684
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    • 2021
  • This paper presents a time-to-digital converter for measuring absolute time differences. The time-to-digital converter was designed and fabricated in 0.18-um CMOS technology and it can be applied to Light Detection and Ranging system which requires long time-cover range and 50ps time resolution. Since designed time-to-digital converter adopted the reference clock of 625MHz generated by phase locked loop, it could have absolute time resolution of 50ps after automatic calibration and its cover range was over than 800ns. The time-to-digital converter adopted a counter and chain delay lines for time measurement. The counter is used for coarse time measurement and chain delay lines are used for fine time measurement. From many times experiments, fabricated time-to-digital converter has 50 ps time resolution with maximum INL of 0.8 LSB and its power consumption is about 70 mW.