• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.2410-2413
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• 2005

Finite element method (FEM) has been widely used as a useful numerical method that can analyze complex engineering problems in electro-magnetics, mechanics, and others. CEMTool, which is similar to MATLAB, is a command style design and analyzing package for scientific and technological algorithm and a matrix based computation language. In this paper, we present new 3D FEM package in CEMTool environment. In contrast to the existing CEMTool 2D FEM package and MATLAB PDE (Partial Differential Equation) Toolbox, our proposed 3D FEM package can deal with complex 3D models, not a cross-section of 3D models. In the pre-processor of 3D FEM package, a new 3D mesh generating algorithm can make information on 3D Delaunay tetrahedral mesh elements for analyses of 3D FEM problems. The solver of the 3D FEM package offers three methods for solving the linear algebraic matrix equation, i.e., Gauss-Jordan elimination solver, Band solver, and Skyline solver. The post-processor visualizes the results for 3D FEM problems such as the deformed position and the stress. Consequently, with our new 3D FEM toolbox, we can analyze more diverse engineering problems which the existing CEMTool 2D FEM package or MATLAB PDE Toolbox can not solve.

• Electrical & Electronic Materials
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• v.10 no.6
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• pp.519-527
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• 1997

The micro crack was occurred where the stress concentrated by the thermal stress which was induced during the cooling period after molding process or by the various reliability tests. In order to estimate the possibility of development from inside micro crack to outside fracture, the fracture toughness of EMC should be measured under the various applicable condition. But study was conducted very rarely for the above area. In order to provide a was to decide the fracture resistance of EMC (Epoxy Molding Compound) of plastic package which is produced by using transfer molding method, measuring fracture is studied. The specimens were made with various EMC material. The diverse combination of test conditions, such as different temperature, temperature /humidity conditions, different filler shapes, and post cure treatment, were tried to examine the effects of environmental condition on the fracture toughness. This study proposed a way which could improve the reliability of LOC(Lead On Chip) type package by comparing the measured $J_{IC}$ of EMC and the calculated J-integral value from FEM(Finite Element Method). The measured $K_{IC}$ value of EMC above glass transition temperature dropped sharply as the temperature increased. The $K_{IC}$ was observed to be higher before the post cure treatment than after the post cure treatment. The change of $J_{IC}$ was significant by time change. J-integral was calculated to have maximum value the angle of the direction of fracture at the lead tip was 0 degree in SOJ package and -30 degree in TSOP package. The results FEM simulation were well agreed with the results of measurement within 5% tolerance. The package crack was proved to be affected more by the structure than by the composing material of package. The structure and the composing material are the variables to reduce the package crack.ack.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.2
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• pp.139-149
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• 2012

A 3D stacked IC is made by multiple dies (possibly) with heterogeneous process technologies. Therefore, die-to-die variation in 2D chips renders on-package variation (OPV) in a 3D chip. In spite of the different variation effect in 3D chips, generally, 3D die stacking can produce high yield due to the smaller individual die area and the averaging effect of variation on data path. However, 3D clock network can experience unintended huge clock skew due to the different clock propagation routes on multiple stacked dies. In this paper, we analyze the on-package variation effect on 3D clock networks and show the necessity of a post silicon management method such as body biasing technique for the OPV induced 3D clock skew control in 3D stacked IC designs. Then, we present a parametric yield improvement method to mitigate the OPV induced 3D clock skew.

• KOREAN JOURNAL OF PACKAGING SCIENCE & TECHNOLOGY
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• v.26 no.2
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• pp.61-69
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• 2020

As post-harvest processes of onions are carried by a 20 kg-net package which results in high-cost and low-efficiency, especially, the insufficient drying and physical damage of onions after harvesting leads to a huge second loss in storage, we had developed a low-cost, high-efficiency post-harvest bulk handling machinery system by collecting onions on a farm using ton-bags, drying with forced air circulation, and sorting/packaging. The post-harvest bulk handling machinery system consisted of 6 devices, and this study designed an automatic feed hopper with a feeding rate control device, an inclined belt conveyor with a two-step chute, and an automatic pallet unloading device for feeding onions into the sorting/packing line. This study also analyzed the performance and control of the total system. The device had 1-ton handling capacity, but the operational condition was set to increase the capacity. The three-step filling method of pallet by the velocity control of the inclined belt conveyor was applied in the post-harvest bulk handling machinery system for the prevention of physical damage. If one worker was set to operate the total system, the time required to complete one palletized load was approximately 5 minutes and 5 seconds. The calculated daily handling capacity was approximately 94 tons, when the daily actual working time was 8 hours. When the developed system was applied to the managerial size of 2,000 ton, the processing cost per ton of the system was decreased by 19.5%, compared with the existing 20 kg-net package-based handling. The developed post-harvest bulk handling machinery system would be a good substitute for the rapid decline and aging of rural labor.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.8
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• pp.1734-1740
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• 2012

In this paper, we propose a FSOURCE circuit which requires such a small switching current that an eFuse OTP memory can be programmed in the post-package state of the PMIC chips using a single power supply. The proposed FSOURCE circuit removes its short-circuit current by using a non-overlapped clock and reduces its maximum current by reducing the turned-on slope of its driving transistor. Also, we propose a DOUT buffer circuit initializing the output data of the eFuse OTP memory with arbitrary data during the power-on reset mode. We design a 24-bit differential paired eFuse OTP memory which uses Magnachip's $0.35{\mu}m$ BCD process, and the layout size is $381.575{\mu}m{\times}354.375{\mu}m$($=0.135mm^2$).

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.4
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• pp.216-231
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• 2001

Several methods for improving device yields and characteristics have been studied by IC manufacturers, as the options for programming components become diversified through the introduction of novel processes. Especially, the sequential repair steps on wafer level and package level are essentially required in DRAMs to improve the yield. Several repair methods for DRAMs are reviewed in this paper. They include the optical methods (laser-fuse, laser-antifuse) and the electrical methods (electrical-fuse, ONO-antifuse). Theses methods can also be categorized into the wafer-level(on wafer) and the package-level(post-package) repair methods. Although the wafer-level laser-fuse repair method is the most widely used up to now, the package-level antifuse repair method is becoming an essential auxiliary technique for its advantage in terms of cost and design efficiency. The advantages of the package-level antifuse method are discussed in this paper with the measured data of manufactured devices. With devices based on several processes, it was verified that the antifuse repair method can improve the net yield by more than 2%~3%. Finally, as an illustration of the usefulness of the package-level antifuse repair method, the repair method was applied to the replica delay circuit of DLL to get the decrease of clock skew from 55ps to 9ps.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1972-1975
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• 2002

In this paper, we have proposed low temperature co-fired ceramic (LTCC) based packaging for RF MEMS devices. The packaging structure is designed and evaluated with 3D full field simulation. 50 ${\Omega}$ matched coplanar waveguide(CPW) transmission line is employed as the test vehicle to evaluate the performances of the proposed package structure. The line is encapsulated with the LTCC packaging lid and connected to the via feed line. To reduce the insertion loss due to the packaging lid, the cavity with via post is formed in the packaging lid. The performances of the package structure is simulated with the different cavity depth and via-to-via length. Simulation results show that the proposed package structure has reflection loss better than 20 dB and insertion loss lower than 0.1 dB from DC to 30 GHz with the cavity depth and via-to-via length of 300 ${\mu}m$ and 350 ${\mu}m$, respectively. To realize the designed package structure, the cavity patterning is tested using the sandblast of LTCC.

• Journal of Welding and Joining
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• v.17 no.2
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• pp.61-65
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• 1999

Because of the need for packages which accommodate high pin count, high density and high speed device, PBGA(plastic ball grid array) package gets more spotlight. But the substrate material which is used for PBGA package is in nature susceptible to moisture penetration. The objective of the study is to find out the path of delamination in the stacked structure of substrate. To increase the adhesion between the cooper laminate and PSR(photo solder resist) which is the weakest part, experiments were performed by changing parameters of printing pre-treatment and post-treatment process. As a result of experiments, the factor effects on the adhesion between the cooper laminate and PSR is caused by all of the pre-treatment and post-treatment condition. A considerable change was observed depending on the amount of UV irradiation after thermal cure which is typical of printing post-treatment condition rather than pre-treatment condition.

• Korean Journal of Organic Agriculture
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• v.5 no.1
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• pp.101-110
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• 1996

Inorder to minimize the daily intake amount of nitrate by chinese cabbage, the favorate vegetable for Korean, the influences of storage conditions at different temperature and light or dark treatments after post-harvest and effects of cooking temperature and infrared rays on changes of nitrate contents in edible parts of chinese cabbage were determined. The nitrate contents on midrib and leaf blade in chinese cabbage during post-harvest were decreased steeply in 2 days and decreased slowly again in 5 days. The temperature treatment to decrease the nitrate contents in midrib and leaf blade of chinese cabbage were effective as the following of $25^{\circ}C$> $15^{\circ}C$ > $-4^{\circ}C$ > $-10^{\circ}C$. The nitrate contents of midrib and leaf blade were decreased in the timecourse of post-harvest. It is more effective to store in $4^{\circ}C$ than in $15^{\circ}C$, and is more effective in transparent vinyl package than in black vinyl package, but the treatment of light is more effective than the treatment of temperature. The nitrate contents of midrib decreased rapidly by 17.9% in the treatment of 5 days at$ 15^{\circ}C$. By treatment of $80^{\circ}C$, $90^{\circ}C$, $100^{\circ}C$ water, the nitrate contents of midrib were increased slightly, but decreased in leaf blade. It reached 68.5%, 50.6%, 45.9% in the leaf blade respectively by treatment of 80%, 90%, 100% water at 1 min. By infrared rays treatment, the nitrate contents of midrib did not change in 3 min but increased rapidly after 6 min, and in the leaf blade it increased continually after 1 min.

• Proceedings of the KOSOMBE Conference
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• v.1993 no.05
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• pp.66-69
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• 1993

We have developed a software package for the analysis of electric field distribution in human body. It includes the graphical finite element mesh generator, linear system of equations solver using sparse matrix and vector technique, and post-processor for the display of the results. This software package can be used in various research areas of biomedical engineering where we inject current or apply voltage to human body. The software package was developed on Macintosh II computer and the size of the model is only limited by the main memory.