• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.391-394
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• 2004

In this study, highly thermal stable Ni Germanosilicide has been utilized using NiPt alloy and novel NiPt/Co/TiN tri-layer. And, the Ni Germanosilicide Properties were characterized according to different Ge ratio (x) in $Si_{l-x}Ge_x$ for the next generation CMOS application. The sheet resistance of Ni Germanosilicide utilizing pure-Ni increased dramatically after the post-silicidation annealing at $600^{\circ}C$ for 30 min. Moreover, more degradation was found as the Ge fraction increases. However, using the proposed NiPt/Co/TiN tri-layer, low temperature silicidation and wide range of RTP process window were achieved as well as the improvement of the thermal stability according to different Ge fractions by the subsequent Co and TiN capping layer above NiPt on the $Si_{l-x}Ge_x$. Therefore, highly thermal immune Ni Germanosilicide up to $600^{\circ}C$ for 30 min is utilized using the NiPt/Co/TiN tri-layer promising for future SiGe based ULSI technology.

• Korean Journal of Materials Research
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• v.9 no.2
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• pp.168-172
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• 1999

We have studied the formation of Co/Ti bilayer silicide with low resistivity and good thermal stability on the heavily boron doped $\textrm{p}^{+}$-Si region. In this paper, Co/Ti bilayer silicides were fabricated by depositing Co($150\AA$)/Ti($50\AA$) films on the clean $\textrm{p}^{+}$-Si substrates in an E-beam evaporator and performing the two step RTA process (first annealing: 650$50^{\circ}C$/20sec, second annealing: $800^{\circ}C$/20sec) in a $N_2$ambient with the pressure of $\textrm{10}^{-1}$atm. Co/Ti bilayer silicides obtained from our experiments exhibited the low resistivity of about $18\mu\Omega$-cm and the uniform thickness of about $500\AA$ without change of sheet resistance and agglomeration under the long post0annealing time up to $1000^{\circ}C$.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.9
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• pp.423-429
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• 2002

RuOx thin films were fabricated by the method of liquid delivery MOCVD using Ru(C$_{8}$ $H_{13}$ $O_2$)$_3$ as the precursor and their thermal effects and conductivity were investigated. Ru films deposited at 25$0^{\circ}C$ were annealed at $650^{\circ}C$ for 1min with Ar, $N_2$ or N $H_3$ ambient. The changes of the micro-structure, the surface morphology and the electrical resistivity of the Ru films after annealing were studied. Ar gas was more effective than $N_2$ and N $H_3$ gases as an ambient gas for the post annealing of the Ru films, because of smaller resistivity and denser grains. The X-ray diffraction and X-ray photoelectron spectroscopy results indicate that the Ru $O_2$ phase and the silicidation are not observed regardless of the ambient gases. The minimum resistivity of the Ru film is found to have the value of 26.35 $\mu$Ω-cm in Ar ambient. Voids were formed at Ru/TiN interface of the Ru layer after annea1ing in $N_2$ ambient. The $N_2$ gas generated due to the oxidation of the TiN layer accumulated at the Ru/TiN interface, forming bubbles; consequently, the stacked film may peel off the Ru/TiN interface.e.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.6
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• pp.487-490
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• 2007

In this paper, the formation and thermal stability characteristics of Ni silicide using Ni-V alloy on Boron cluster ($B_{18}H_{22}$) implanted bulk and SOI substrate were examined in comparison with pure Ni for nano-scale CMOSFET. The Ni silicide using Ni-V alloy on $B_{18}H_{22}$ implanted SOI substrate after high temperature post-silicidation annealing showed the lower sheet resistance, no agglomeration interface image and lower surface roughness than that using pure Ni. The thermal stability of Ni silicide was improved by using Ni-V alloy on $B_{18}H_{22}$ implanted SOI substrate.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.12
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• pp.1-9
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• 2003

In this paper, a novel Ni silicide technology with Cobalt interlayer and Titanium Nitride(TiN) capping layer for sub 100 nm CMOS technologies is presented, and the device parameters are characterized. The thermal stability of hi silicide is improved a lot by applying co-interlayer at Ni/Si interface. TiN capping layer is also applied to prevent the abnormal oxidation of NiSi and to provide a smooth silicidc interface. The proposed NiSi structure showed almost same electrical properties such as little variation of sheet resistance, leakage current and drive current even after the post silicidation furnace annealing at $700^{\circ}C$ for 30 min. Therefore, it is confirmed that high thermal robust Ni silicide for the nano CMOS device is achieved by newly proposed Co/Ni/TiN structure.